Datasheet

AD9119/AD9129 Data Sheet
Rev. A | Page 4 of 68
LVDS DIGITAL SPECIFICATIONS
VDDA = VDD = 1.8 V, VSSA = −1.5 V, I
OUTFS
= 33 mA, T
A
= −40°C to +85°C. LVDS drivers and receivers are compatible with the IEEE
Standard 1596.3-1996, unless otherwise noted.
Table 2.
Parameter Symbol Test Conditions/Comments Min Typ Max Unit
LVDS DATA INPUTS (P1_D[13:0]P, P1_D[13:0]N,
P0_D[13:0]P, P0_D[13:0]N, FRM_P, FRM_N)
Px_DxP = V
IA
, Px_DxN = V
IB
Input Voltage Range V
IA
, V
IB
825 1575 mV
Input Differential Threshold V
IDTH
−100 +100 mV
Input Differential Hysteresis V
IDTHH
− V
IDTHL
20 mV
Receiver Differential Input Impedance R
IN
80 120 Ω
LVDS Input Rate 1425 MSPS
Input Capacitance 1.2 pF
LVDS CLOCK INPUTS (DCI_P, DCI_N) DCI_P = V
IA
, DCI_N = V
IB
Input Voltage Range V
IA
, V
IB
825 1575 mV
Input Differential Threshold V
IDTH
−225 +225 mV
Input Differential Hysteresis V
IDTHH
− V
IDTHL
20 mV
Receiver Differential Input Impedance R
IN
80 120 Ω
Maximum Clock Rate
712.5
MHz
LVDS CLOCK OUTPUTS (DCO_P, DCO_N)
DCO_P = V
OA
, DCO_N = V
OB
,
100 Ω termination
Output Voltage High V
OA
, V
OB
1375 mV
Output Voltage Low V
OA
, V
OB
1025 mV
Output Differential Voltage |V
OA
|, |V
OB
| Register 0x7C[7:6] = 01b (default) 200 225 250 mV
Output Offset Voltage V
OS
1150 1250 mV
Output Impedance, Single-Ended R
O
80 100 120 Ω
R
O
Mismatch Between A and B
∆R
O
10
%
Change in |V
OD
| Between Setting 0 and Setting 1 |∆V
OD
| 25 mV
Change in V
OS
Between Setting 0 and Setting 1 ∆V
OS
25 mV
Output Current
Driver Shorted to Ground I
SA
, I
SB
20 mA
Drivers Shorted Together I
SAB
4 mA
Power-Off Output Leakage
|I
XA
|, |I
XB
|
10
µA
Maximum Clock Rate 712.5 MHz
HSTL DIGITAL SPECIFICATIONS
VDDA = VDD = 1.8 V, VSSA = −1.5 V, I
OUTFS
= 33 mA, T
A
= −40°C to +85°C. HSTL receiver levels are compatible with the EIA/JEDEC
JESD8-6 standard, unless otherwise noted.
Table 3.
Parameter Symbol Test Comments/Conditions Min Typ Max Unit
HSTL DATA INPUTS (P1_D[13:0]P, P1_D[13:0]N,
P0_D[13:0]P, P0_D[13:0]N, FRM_P, FRM_N)
Px_DxP = V
IA
, Px_DxN = V
IB
Common-Mode Input Voltage Range V
IA
, V
IB
0.68 0.9 V
Differential Input Voltage 200 mV
Receiver Differential Input Impedance R
IN
80 120 Ω
HSTL Input Rate 1425 MSPS
Input Capacitance 1.2 pF
HSTL CLOCK INPUT (DCI_P, DCI_N) DCI_P = V
IA
, DCI_N = V
IB
Common-Mode Input Voltage Range V
IA
, V
IB
0.68 0.9 mV
Differential Input Voltage 450 mV
Receiver Differential Input Impedance R
IN
80 120 Ω
Maximum Clock Rate 712.5 MHz