Datasheet

AD9119/AD9129 Data Sheet
Rev. A | Page 10 of 68
1 2 3 4 5 6 7 8 9 10 11 12 13 14
A
B
C
D
E
F
G
H
J
K
L
M
N
P
VREF
VSSA
VDDA SH IOUTP IOUTN VDDA SH VDDA VDDA VDDA VSSC VSSC VSSC
VDDA
I250U
VSSA VSSA
VSSA
VDDA SH VDDA
DACCLK_N
VSS VSS VSS VSS
VSS VSS VSS VSS
SCLK DCI_P DCI_N FRM_P FRM_N
P1_D3P P1_D4P P1_D5P P1_D6P P1_D7P P1_D8P P1_D9P P1_D10P P1_D11P P1_D12P P1_D13P
VSSA VSSA
VSSCVDDA VDDA VSSC
VDDAVDDA VDDA
VSSA VDDA SH
VSSVSSCVDDA VDDA VSSC VSS
VSS VSS VSSVSSCVDDA VDDA
VSSC
VSSC
VSSC VSSCVSSC VSSCVSSC
DACCLK_P
VDDAVDDA VSSC
VSS VDD VDD VDD
VDD VDD VDD
VDD VDD VDD
VDD
VDD
VSSC
VSS VSSVSS
IRQRESET VSS VSS
VDD VDDSDOSDIO
P1_D3N P1_D4N P1_D5N P1_D6N P1_D7N P1_D8N P1_D9N P1_D10N P1_D11N P1_D12N P1_D13N
P0_D3P P0_D4P P0_D5P P0_D6P P0_D7P P0_D8P P0_D9P P0_D10P P0_D11P P0_D12P P0_D13P
P0_D3N
P0_D4N
P0_D5N
P0_D6N P0_D7N P0_D8N P0_D9N P0_D10N P0_D11N P0_D12N P0_D13N
VDDAVDDA
VSSA VDDA
VDDAVDDA
VSSC VSSC
VSSC
DCO_P DCO_N
AD9129
SYNC
P1_D0P P1_D1P P1_D2P
P1_D0N P1_D1N P1_D2N
P0_D0P P0_D1P P0_D2P
P0_D0N P0_D1N P0_D2N
11149-003
CS
Figure 3. AD9129 Pin Configuration
Table 9. AD9129 Pin Function Descriptions
Pin No. Mnemonic Description
A1 I250U
Nominal 1.0 V Reference. Tie this pin to VSSA via a 4.0 kΩ resistor to generate
a 250 µA reference current.
A2 VREF Voltage Reference Input/Output. Decouple to VSSA with a 1 nF capacitor.
A3, A4, B3, B4, B5, C4, C5, C6 VSSA −1.5 V Analog Supply Voltage Input.
A5, A8, B6, B7 VDDA SH +1.8 V Analog Supply Shield. Tie these pins to VDDA at the DAC.
A9, A10, A11, B1, B2, B8, B9, B10,
B11, C2, C3, C7, C8, C9, C10, D2,
D3, D4, D7, E1, E2
VDDA +1.8 V Analog Supply Voltage Input.
G12, G13, G14, H11, H12, H13,
H14, J3, J4, J11, J12, J13, J14
VDD +1.8 V Digital Supply Voltage Input.
C13, C14, D12, D13, D14, E11,
E12, E13, E14, F11, F12, F13, F14,
G1, G2, G3, G11, H3, H4
VSS +1.8 V Digital Supply Return.