Datasheet

AD9125
Rev. 0 | Page 20 of 56
Register Name
Addr
(Hex) Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Default
FTW 1 (LSB) 0x30 FTW[7:0] 0x00
FTW 2 0x31 FTW[15:8] 0x00
FTW 3 0x32 FTW[23:16] 0x00
FTW 4 (MSB) 0x33 FTW[31:24] 0x00
NCO Phase Offset
LSB
0x34 NCO phase offset[7:0] 0x00
NCO Phase Offset
MSB
0x35 NCO phase offset[15:8] 0x00
NCO FTW Update 0x36 Frame
FTW ack
Frame FTW
request
Update
FTW ack
Update
FTW
request
0x00
I Phase Adj LSB 0x38 I phase adjust[7:0] 0x00
I Phase Adj MSB 0x39 I phase adjust[9:8] 0x00
Q Phase Adj LSB 0x3A Q phase adjust[7:0] 0x00
Q Phase Adj MSB 0x3B Q phase adjust[9:8] 0x00
I DAC Offset LSB 0x3C I DAC offset[7:0] 0x00
I DAC Offset MSB 0x3D I DAC offset[15:8] 0x00
Q DAC Offset LSB 0x3E Q DAC offset[7:0] 0x00
Q DAC Offset MSB 0x3F Q DAC offset[15:8] 0x00
I DAC FS Adjust 0x40 I DAC FS adjust[7:0] 0xF9
I DAC Control 0x41 I DAC
sleep
I DAC FS adjust[9:8] 0x01
Aux DAC I Data 0x42 I aux DAC[7:0] 0x00
I Aux DAC
Control
0x43 I Aux
DAC sign
I Aux DAC
current
direction
I aux DAC
sleep
I aux DAC[9:8] 0x00
Q DAC FS Adjust 0x44 Q DAC FS adjust[7:0] 0xF9
Q DAC Control 0x45 Q DAC
sleep
Q DAC FS adjust[9:8] 0x01
Aux DAC Q Data 0x46 Q aux DAC[7:0] 0x00
Q Aux DAC
Control
0x47 Q Aux
DAC sign
Q Aux DAC
current
direction
Q aux
DAC
sleep
Q aux DAC[9:8] 0x00
Die Temperature
Range Control
0x48 FS current[2:0] Reference current[2:0] Capacitor
value
0x02
Die Temperature
LSB
0x49 Die temperature[7:0] N/A
Die Temperature
MSB
0x4A Die temperature[15:8] N/A
SED Control 0x67 SED
compare
enable
Sample
error
detected
Auto-
clear
enable
Compare
fail
Compare
pass
0x00
Compare I0 LSBs 0x68 Compare Value I0[7:0] 0xB6
Compare
I0 MSBs
0x69 Compare Value I0[15:8] 0x7A
Compare
Q0 LSBs
0x6A Compare Value Q0[7:0] 0x45
Compare
Q0 MSBs
0x6B Compare Value Q0[15:8] 0xEA
Compare I1 LSBs 0x6C Compare Value I1[7:0] 0x16
Compare I1 MSBs 0x6D Compare Value I1[15:8] 0x1A
Compare
Q1 LSBs
0x6E Compare Value Q1[7:0] 0xC6