Datasheet

AD9122
Rev. B | Page 46 of 60
ANALOG OUTPUTS
TRANSMIT DAC OPERATION
Figure 66 shows a simplified block diagram of the transmit path
DACs. The DAC core consists of a current source array, a switch
core, digital control logic, and full-scale output current control.
The DAC full-scale output current (I
FS
) is nominally 20 mA.
The output currents from the IOUT1P/IOUT2P and IOUT1N/
IOUT2N pins are complementary, meaning that the sum of the
two currents always equals the full-scale current of the DAC.
The digital input code to the DAC determines the effective
differential current delivered to the load.
I DAC
IOUT1P
IOUT1N
Q DAC
IOUT2N
IOUT2P
CURRENT
SCALING
I DAC FS ADJUST
REGISTER 0x40
Q DAC FS ADJUST
REGISTER 0x44
0.1µ
F
10kΩ
R
SET
FSADJ
REFIO
5kΩ
1.2V
08281-037
Figure 66. Simplified Block Diagram of DAC Core
The DAC has a 1.2 V band gap reference with an output imped-
ance of 5 kΩ. The reference output voltage appears on the REFIO
pin. When using the internal reference, decouple the REFIO pin
to AVSS with a 0.1 μF capacitor. Use the internal reference only for
external circuits that draw dc currents of 2 μA or less. For dynamic
loads or static loads greater than 2 μA, buffer the REFIO pin. If
desired, the internal reference can be overdriven by applying an
external reference (from 1.10 V to 1.30 V) to the REFIO pin.
A 10 kΩ external resistor, R
SET
, must be connected from the
FSADJ pin to AVSS. This resistor, along with the reference control
amplifier, sets up the correct internal bias currents for the DAC.
Because the full-scale current is inversely proportional to this
resistor, the tolerance of R
SET
is reflected in the full-scale output
amplitude.
The full-scale current equation, where the DAC gain is set individ-
ually for the I and Q DACs in Register 0x40 and Register 0x44,
respectively, is as follows:
⎟
⎠
⎞
⎜
⎝
⎛
⎟
⎠
⎞
⎜
⎝
⎛
×+×= DAC gain
R
I
SET
FS
16
3
72
V
REF
For the nominal values of V
REF
(1.2 V), R
SET
(10 kΩ), and
DAC gain (512), the full-scale current of the DAC is typically
20.16 mA. The DAC full-scale current can be adjusted from
8.64 mA to 31.68 mA by setting the DAC gain parameter, as
shown in Figure 67.
35
0
0 1000
DAC GAIN CODE
I
FS
(mA)
30
25
20
15
10
5
200 400 600 800
08281-036
Figure 67. DAC Full-Scale Current vs. DAC Gain Code
Transmit DAC Transfer Function
The output currents from the IOUT1P/IOUT2P and IOUT1N/
IOUT2N pins are complementary, meaning that the sum of the
two currents always equals the full-scale current of the DAC. The
digital input code to the DAC determines the effective differential
current delivered to the load. IOUT1P/IOUT2P provide maxi-
mum output current when all bits are high. The output currents
vs. DACCODE for the DAC outputs are expressed as
FS
N
OUTxP
I
DACCODE
I ×
⎥
⎦
⎤
⎢
⎣
⎡
=
2
(1)
OUTxP
FS
OUTxN
III
−
=
(2)
where
DACCODE = 0 to 2
N
− 1.
Transmit DAC Output Configurations
The optimum noise and distortion performance of the AD9122
is realized when it is configured for differential operation. The
common-mode error sources of the DAC outputs are significantly
reduced by the common-mode rejection of a transformer or
differential amplifier. These common-mode error sources include
even-order distortion products and noise. The enhancement in
distortion performance becomes more significant as the frequency
content of the reconstructed waveform increases and/or its
amplitude increases. This is due to the first-order cancellation
of various dynamic common-mode distortion mechanisms,
digital feedthrough, and noise.