Datasheet

AD9122
Rev. B | Page 29 of 60
Register
Name
Address
(Hex) Bits Name Description Default
Q DAC
Offset LSB
0x3E [7:0] Q DAC Offset[7:0] See Register 0x3F. 00000000
Q DAC
Offset MSB
0x3F [7:0] Q DAC Offset[15:8]
Q DAC Offset[15:0] is a value that is added directly to the
samples written to the Q DAC.
00000000
I DAC
FS Adjust
0x40 [7:0] I DAC FS Adj[7:0] See Register 0x41, Bits[1:0]. 11111001
I DAC
Control
0x41 7 I DAC sleep 1 = puts the I DAC into sleep mode (fast wake-up mode). 0
[1:0] I DAC FS Adj[9:8]
I DAC FS Adj[9:0] sets the full-scale current of the I DAC.
The full-scale current can be adjusted from 8.64 mA to
31.68 mA in step sizes of approximately 22.5 μA.
01
0x000 = 8.64 mA.
…
0x200 = 20.16 mA.
…
0x3FF = 31.68 mA.
I Aux DAC
Data
0x42 [7:0] I Aux DAC[7:0] See Register 0x43, Bits[1:0]. 00000000
I Aux DAC
Control
0x43 7 I aux DAC sign
0 = the I auxiliary DAC sign is positive, and the current is
directed to the IOUT1P pin (Pin 67).
0
1 = the I auxiliary DAC sign is negative, and the current is
directed to the IOUT1N pin (Pin 66).
6
I aux DAC current
direction
0 = the I auxiliary DAC sources current. 0
1 = the I auxiliary DAC sinks current.
5 I aux DAC sleep 1 = puts the I auxiliary DAC into sleep mode. 0
[1:0] I Aux DAC[9:8]
I Aux DAC[9:0] sets the magnitude of the auxiliary DAC
current. The range is 0 mA to 2 mA, and the step size is 2 μA.
00
0x000 = 0.000 mA.
0x001 = 0.002 mA.
…
0x3FF = 2.046 mA.
Q DAC
FS Adjust
0x44 [7:0] Q DAC FS Adj[7:0] See Register 0x45, Bits[1:0]. 11111001
Q DAC
Control
0x45 7 Q DAC sleep 1 = puts the Q DAC into sleep mode (fast wake-up mode). 0
[1:0] Q DAC FS Adj[9:8]
Q DAC FS Adj[9:0] sets the full-scale current of the Q DAC.
The full-scale current can be adjusted from 8.64 mA to
31.68 mA in step sizes of approximately 22.5 μA.
01
0x000 = 8.64 mA.
…
0x200 = 20.16 mA.
…
0x3FF = 31.68 mA.
Q Aux DAC
Data
0x46 [7:0]
Q Aux DAC[7:0]
See Register 0x47, Bits[1:0]. 00000000