Datasheet

AD9122
Rev. B | Page 23 of 60
Addr
(Hex) Register Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Default
0x6C Compare I1 LSBs Compare Value I1[7:0] 0x16
0x6D
Compare
I1 MSBs
Compare Value I1[15:8] 0x1A
0x6E
Compare
Q1 LSBs
Compare Value Q1[7:0] 0xC6
0x6F
Compare
Q1 MSBs
Compare Value Q1[15:8] 0xAA
0x70 SED I LSBs Errors Detected I_BITS[7:0] 0x00
0x71 SED I MSBs Errors Detected I_BITS[15:8] 0x00
0x72 SED Q LSBs Errors Detected Q_BITS[7:0] 0x00
0x73 SED Q MSBs Errors Detected Q_BITS[15:8] 0x00
0x7F Revision 0 0 Revision[3:0] 0 0 N/A
Table 11. Device Configuration Register Descriptions
Register
Name
Address
(Hex) Bits Name Description Default
Comm 0x00 7 SDIO SDIO pin operation. 0
0 = SDIO operates as an input only.
1 = SDIO operates as a bidirectional input/output.
6 LSB_FIRST Serial port communication, LSB or MSB first. 0
0 = MSB first.
1 = LSB first.
5 Reset
The device is placed in reset when this bit is written high
and remains in reset until the bit is written low.
0
Power
Control
0x01 7 Power down I DAC 1 = power down I DAC. 0
6 Power down Q DAC 1 = power down Q DAC. 0
5
Power down data
receiver
1 = power down the input data receiver. 0
4
Power down auxiliary
ADC
1 = power down the auxiliary ADC for temperature sensor. 1
Data
Format
0x03 7 Binary data format 0 = input data is in twos complement format. 0
1 = input data is in binary format.
6 Q data first Indicates I/Q data pairing on data input. 0
0 = I data sent to data receiver first.
1 = Q data sent to data receiver first.
5 MSB swap Swaps the bit order of the data input port. 0
0 = order of the data bits corresponds to the pin descriptions.
1 = bit designations are swapped; most significant bits
become the least significant bits.
[1:0] Data Bus Width[1:0]
Data receiver interface mode. See the LVDS Input Data Ports
section for information about the operation of the different
interface modes.
00
00 = word mode; 16-bit interface bus width.
01 = byte mode; 8-bit interface bus width.
10 = nibble mode; 4-bit interface bus width.
11 = invalid.
Interrupt
Enable
0x04 7 Enable PLL lock lost 1 = enable interrupt for PLL lock lost. 0
6 Enable PLL locked 1 = enable interrupt for PLL locked. 0
5 Enable sync signal lost 1 = enable interrupt for sync signal lost. 0
4 Enable sync signal locked 1 = enable interrupt for sync signal locked. 0
1 Enable FIFO Warning 1 1 = enable interrupt for FIFO Warning 1. 0
0 Enable FIFO Warning 2 1 = enable interrupt for FIFO Warning 2. 0