Datasheet

AD9122
Rev. B | Page 18 of 60
DIFFERENCES BETWEEN AD9122R1 AND AD9122R2
The AD9122 underwent a die revision in early 2010, which
incremented the die revision from R1 to R2. The following list
explains the differences between the revisions.
• IOVDD supply voltage range.
For the AD9122R1, the valid operational voltage range
for IOVDD is 1.8 V to 2.5 V ± 10%. For the AD9122R2,
the valid operational voltage range for IOVDD is 1.8 V
to 3.3 V ± 10%.
• Reduction in spurs level variation.
The AD9122R1 has variation in the f
DATA
± f
OUT
spur level
between device startups. The AD9122R2 has a consistent
and lower f
DATA
± f
OUT
spur level. (The AD9122R2 still has
a spur level variation between power cycles of about 5 dB
if the PLL is enabled.)
• DCI delay feature added.
The AD9122R2 has a programmable delay associated with
the DCI signal. There are four programmable delay options.
The 00 setting gives the minimum delay and leaves the
timing unchanged from the AD9122R1. Additional delay
can be added to improve timing margins in some systems.
The resulting timing options are shown in Table 13.
• Power-down mode power consumption increase.
The maximum power-down mode power consumption
of the R1 devices is 9.8 mW. This power consumption
increased to 18.8 mW in the R2 devices.
• Configuration register map changes.
Register 0x0B, Bit 5:
AD9122R1 Æ Enable VCO
AD9122R2 Æ Inactive bit. The VCO is now enabled
when the PLL is enabled.
Register 0x16, Bits[1:0]:
AD9122R1 Æ Unused
AD9122R2 Æ These bits control the delay of the DCI
signal (00 = minimum delay, 11 = maximum delay).
Register 0x7F:
AD9122R1 Æ Version ID = 0x04
AD9122R2 Æ Version ID = 0x0C
DEVICE MARKING OF AD9122R1 AND AD9122R2
Revision 1 devices are marked as shown in Figure 36. Revision 1
devices with TxDAC® as the top line have date codes earlier than
#1001. Revision 1 devices with AD80255 as the top line have date
codes of #1001 or later.
TxDAC
®
AD9122BCPZ
#0935
1688587.1
KOREA
DATE CODE
AD80255
AD9122BCPZ
#1001
1688586.1
KOREA
08281-136
Figure 36. Revision 1 Silicon, AD9122BCPZ Marking
Revision 2 devices are marked as shown in Figure 37. Revision 2
devices have TxDAC® as the top line and date codes of #1001 or
later.
DATE CODE
TxDAC
®
AD9122BCPZ
#1021
1688782.1
KOREA
08281-137
Figure 37. Revision 2 Silicon, AD9122BCPZ Marking