Datasheet
REV. D
AD9057
–10–
U4
74AC00
1
2
3
U4
74AC00
4
5
6
U4
74AC00
12
13
11
U4
74AC00
9
10
8
R7
50
⍀
PWRDN
VREF OUT
VREF IN
GND
V
D
BIAS OUT
AIN
V
D
GND
ENC
1
2
3
4
5
6
7
8
9
10
(LSB) D0
D1
D2
D3
GND
V
DD
D4
D5
D6
(MSB) D7
20
19
18
17
16
15
14
13
12
11
D0
D1
D2
D3
GND
V
DD
D4
D5
D6
D7
GND
5V
5V
GND
E12
E11
E10
C2
0.1
F
R6
10
⍀
C1
0.1
F
E4
E5
E6
J6, REF
GND
PWRDN
5V
E7
E9
E8
R5
2k
⍀
R10
500
R4
2k
⍀
8
7
6
5
DIS
+V
S
NC
NC
–V
S
U2
AD8041Q
C17
0.1F
1
R2
1k⍀
E2
R1
50⍀
BNC
J1
ANALOG IN
DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
1
2
3
4
5
6
7
8
9
10
(LSB)
(MSB)
CLOCK
DVDD
AVDD
COMP2
COMP1
FS ADJ
REFIO
REFLO
SLEEP
IOUT
AB
28
DAC
AD9760AR
27
24
23
19
18
17
16
15
DA7
DA6
DA5
DA4
DA3
DA2
DA1
DA0
GND
GND
22 21
PWRDN
5V
5V
5V
C18
0.1F
C19
0.1F
R9
2k⍀
C13
0.1F
R11
50⍀
R8
50⍀
BNC
J2
1
2
3
4
5
6
7
8
C37DRPF
P2
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
DA0
DA1
DA2
DA3
DA4
DA5
DA6
DA7
8D
7D
6D
5D
4D
3D
2D
1D
12
13
14
15
16
17
18
19
8Q
7Q
6Q
5Q
4Q
3Q
2Q
1Q
9
8
7
6
5
4
3
2
CK
OE
111
D7
D6
D5
D4
D3
D2
D1
D0
DA7
DA6
DA5
DA4
DA3
DA2
DA1
DA0
U3
74ACQ574
R3
1k⍀
BNC
J3
ENCODE
ANALOG
RECONSTRUCT
DAC OUT
C11
10F
C10
0.1F
+
J7, V
DD
V
DD
J4, GND
C14
0.1F
C8
0.1F
C7
0.1F
C12
10F
C9
0.1F
C5
0.1F
C4
0.1F
+
C3
0.1F
J5, 5V
DECOUPLING CAPS
2
3
4
E1
E3
AD9057
Figure 7. Evaluation Board Schematic