Datasheet

AD8801/AD8803
REV. A
–7–
100
0.0001
2.5
0.01
0.001
0.50
0.1
1.0
10
21.51
LOGIC INPUT VOLTAGE – Volts
53 4.543.5
T
A
= +25°C
ALL DIGITAL INPUTS
TIED TOGETHER
I
DD
SUPPLY CURRENT – mA
V
DD
= +5V
V
DD
= +3V
Figure 13. Supply Current vs. Logic Input Voltage
80
60
100 100k10k1k10
40
20
FREQUENCY – Hz
PSRR – dB
0
V
DD
= +5V ±0.5V
P
V
REFH
= +2V
CODE = 80
H
T
A
= +25°C
Figure 14. Power Supply Rejection vs. Frequency
10
0%
100
90
0%
V
DD
= +5V
V
REF
= +2V
TIME – 1µs/DIV
2V
0V
5V
0V
OUT1
CS
Figure 15. Large-Signal Settling Time
10
0%
100
90
OUTPUT1: OO
H
→ FF
H
TIME – 0.2µs/DIV
OUTPUT2 – 10mV/DIV
V
DD
= +5V
V
REF
= +2V
f = 500kHz
Figure 16. Adjacent Channel Clock Feedthrough
10
0%
100
90
OUTPUT1: 7F
H
→ 80
H
V
DD
= +5V
V
REF
= +2V
TIME – 0.2µs/DIV
OUT1
10mV/DIV
CS
5V/DIV
Figure 17. Midscale Transition
HOURS OF OPERATION AT 150°C
0.01
–0.01
0 600
CHANGE IN ZERO-SCALE ERROR – LSB
150 300 450
0
–0.005
0.005
V
DD
= +4.5V
V
REF
= +4.5V
SS = 162 PCS
V
REFL
= 0V
Figure 18. Zero-Scale Error Accelerated by Burn-In