Datasheet

AD8556
Rev. A | Page 25 of 28
To show the benefits that the AD8556 brings to new applications
where EMI/RFI signals are present, a part was programmed
with a gain of 70 and a dc offset of 2.5 V to produce a VOUT of
0 V. A test circuit like that shown in
Figure 52 was used.
Figure 52 simulates the presence of a noisy common-mode
signal, and
Figure 53 shows the response dc values at VOUT.
AD8556
VCC
VEE
FILTER
DATA
–IN
+IN
VCLAMP
VOUT
+2.5
V
2.5
V
U3
VARIABLE
V3
1
2
3
45
6
7
8
+2.5V
VOUT
05448-051
+
Figure 52. Test Circuit to Show AD8556 Performance
Exposed to Common-Mode RFI/EMI Signals
05448-054
–20
0
20
40
60
80
100
0 200 400 600 800 1000 1200
FREQUENCY (MHz)
DEVI
A
TION FROM DC OUTPUT (mV)
NON-ENHANCED FOR EMI
AD8556 (ENHANCED PART FOR EMI)
Figure 53. DC Offset Values at VOUT Caused by Frequency Seep of Input
The differential bandwidth defines the frequency response of
the filters with a differential signal applied between the two
inputs, VPOS (that is, +IN ) and VNEG (that is, –IN).
Figure 54
shows the circuit used to test for AD8556 EMI/RFI susceptibility.
The part is programmed as previously stated during the
common-mode testing.
AD8556
VCC VEE
FILTER
DATA
–IN +IN
VCLAMP
VOUT
+2.5
V
2.5
V
U2
200mV p-p
V2
1
2
3
45
6
7
8
+2.5V
VOUT
0
5448-052
+
Figure 54. Test Circuit to Show AD8556 Performance Exposed to
Differential Mode RFI/EMI Signals
The response of AD8556 to EMI/RFI differential signals is
shown in
Figure 55.
05448-055
–1400
–1200
–1000
–800
–600
–400
–200
0
200
400
600
0 200 400 600 800 1000 1200
FREQUENCY (MHz)
DC OFFSET (mV)
AD8556
NON-ENHANCED PART
Figure 55. Response of AD8556 to EMI/RFI Differential Signals
To make a board robust against EMI, the leads at VPOS and
VNEG should be as similar as possible. In this way, any EMI
received by the VPOS and VNEG pins will be similar (that is, a
common-mode input), and rejected by the AD8556. Furthermore,
additional filtering at the VPOS and VNEG pins should give a
better reduction of unwanted behavior compared with filtering
at the other pins.