Datasheet
AD8553
Rev. A | Page 13 of 20
MAXIMIZING PERFORMANCE THROUGH PROPER
LAYOUT
To achieve the maximum performance of the AD8553, care
should be taken in the circuit board layout. The PC board
surface must remain clean and free of moisture to avoid leakage
currents between adjacent traces. Surface coating of the circuit
board reduces surface moisture and provides a humidity barrier,
reducing parasitic resistance on the board.
Care must be taken to minimize parasitic capacitance on Pin 1
and Pin 10 (Resistor R1 connections). Traces from Pin 1 and
Pin 10 to R1 should be kept short and symmetric. Excessive
capacitance on these pins will result in a gain error. This effect
is most prominent at low gains (G < 10).
For high impedance sources, the PC board traces from the
AD8553 inputs should be kept to a minimum to reduce input
bias current errors.
POWER SUPPLY BYPASSING
The AD8553 uses internally generated clock signals to perform
the autocorrection. As a result, proper bypassing is necessary to
achieve optimum performance. Inadequate or improper bypassing
of the supply lines can lead to excessive noise and offset voltage.
A 0.1 µF surface-mount capacitor should be connected between
the supply lines. This capacitor is necessary to minimize ripple
from the correction clocks inside the IC. For dual-supply
operation (see Figure 33), a 0.1 µF (ceramic) surface-mount
capacitor should be connected from each supply pin to ground.
For single-supply operation, a 0.1 µF surface-mount capacitor
should be connected from the supply line to ground.
All bypass capacitors should be positioned as close to the DUT
supply pins as possible, especially the bypass capacitor between
the supplies. Placement of the bypass capacitor on the back of
the board directly under the DUT is preferred.
INPUT OVERVOLTAGE PROTECTION
All terminals of the AD8553 are protected against ESD. In the
case of a dc overload voltage beyond either supply, a large
current would flow directly through the ESD protection diodes.
If such a condition should occur, an external resistor should be
used in series with the inputs to limit current for voltages
beyond the supply rails. The AD8553 can safely handle 5 mA of
continuous current, resulting in an external resistor selection of
R
EXT
= (V
IN
− V
S
)/5 mA.
CAPACITIVE LOAD DRIVE
The output buffer, Pin 4, can drive capacitive loads up to 100 pF.
I
I
I–I
R1
M2
V
INP
M3 M4
M1
R1
(V
INP
–V
INN
)
I
R1
=
R1
2I 2I
V
INN
V
BIAS
M5
M6
I–I
R1
I+I
R1
2I
R1
C2
R2
V
REF
A1
V
INP
–V
INN
R1
2R2
V
OUT
=V
REF
+
05474-030
EXTERNAL
V
CC
Figure 30. Simplified AD8553 Schematic