Datasheet

Data Sheet AD8436
Rev. B | Page 19 of 24
10033-147
Figure 47. Photograph of the AD8436-EVALZ
10033-148
TSUM
TACIN
VCC
VEE
GND5GND4GND3GND2
DC
OUT
TIBUFOUT
TIBFIN+
VEE
CAVG VCC
OBUFOUT
IGND
OBUFIN+
OBUFIN–
OBUFV+
OUTDNC
IBUFIN–
IBUFOUT
IBUFIN+
SUM IBUFV+
1
4
3
2
5
876 9
12
11
10
16
15
14
13
TCAVG
CORE
BUF
CORE
BUF
TOBFOUT
GND1
+
TDCOUT
GND6
SDCOUT
CIN
10µF
DCAC
TRMSIN
TIBFIN–
TOGND
TOUT
TIGND
TOBUFIN+
TOBUFIN−
TOBUFV+
TIBUFV+
EN
EN
DIS
IBUF_VCC
DIS
TBUFGN
OGND
BUF
GAIN
CCF
+
VEE
+
19 18 1720
INCOUP
DNC
RMS
TCCF
AD8436
+
C1
3
10µF
50V
–40°C TO +125°C
C6
1
2.2µF
C7
1
1.5µF
C3
3
0.1µF
CAVG
10µF
CCF
0.1µF
X8R
C4
0.1µF
CLPF
3.3µF
C5
0.47µF
R3
1
8.06kΩ
R4
1
0Ω
R8
0Ω
R7
2
0Ω
R6
3
0Ω
R2
0Ω
R5
4
0Ω
R1
10MΩ
RFBL
5
DNI
RFBH
4
0Ω
C2
10µF
50V
–40°C TO
+125°C
–V
3
(GRN)
+V
(RED)
OBUF_VCC
CORE_BUF
AC_IN
1
OPTIONAL COMPONENTS TO CONFIGURE IBUFOUT AS A FILTER.
2
REMOVE R7 FOR CORE-ONLY TESTS.
3
FOR SINGLE SUPPLY OPERATION, REMOVE R6, SHORT OR REPLACE C3 WITH A 0Ω RESISTOR AND CONNECT THE SUPPLY GROUND OR RETURN TO
THE GREEN TEST LOOP –V.
4
TO CONFIGURE THE FET INPUT BUFFER FOR GAIN OF 2, INSTALL 0Ω RESISTOR AT R5 AND REMOVE RFBH.
5
RFBL IS USED TO CONFIGURE THE INPUT BUFFER FOR GAIN VALUES >2×.
Figure 48. Evaluation Board Schematic