Datasheet

–2–
REV. E
AD842–SPECIFICATIONS
Model AD842J/JR
1
AD842K AD842S
2
Conditions Min Typ Max Min Typ Max Min Typ Max Units
INPUT OFFSET VOLTAGE
3
0.5 1.5 0.3 1.0 0.5 1.5 mV
T
MIN
–T
MAX
2.5/3 1.5 3.5 mV
Offset Drift 14 14 14 µV/°C
INPUT BIAS CURRENT 4.2 8 3.5 5 4.2 8 µA
T
MIN
–T
MAX
10 612µA
Input Offset Current 0.1 0.4 0.05 0.2 0.1 0.4 µA
T
MIN
–T
MAX
0.5 0.3 0.6 µA
INPUT CHARACTERISTICS Differential Mode
Input Resistance 100 100 100 kΩ
Input Capacitance 2.0 2.0 2.0 pF
INPUT VOLTAGE RANGE
Common Mode ⴞ10 ⴞ10 ⴞ10 V
Common-Mode Rejection V
CM
= ±10 V 86 115 90 115 86 115 dB
T
MIN
–T
MAX
80 86 80 dB
INPUT VOLTAGE NOISE f = 1 kHz 9 9 9 nV/√Hz
Wideband Noise 10 Hz to 10 MHz 28 28 28 µV rms
OPEN-LOOP GAIN V
O
= ±10 V
R
LOAD
≥ 500 Ω 40/30 90 50 90 40 90 V/mV
T
MIN
–T
MAX
20/15 25 20 V/mV
OUTPUT CHARACTERISTICS
Voltage R
LOAD
≥ 500 Ω ⴞ10 ⴞ10 ⴞ10 V
Current V
OUT
= ±10 V 100 100 100 mA
Open Loop 5 5 5 Ω
FREQUENCY RESPONSE
Gain Bandwidth Product V
OUT
= 90 mV 80 80 80 MHz
Full Power Bandwidth
4
V
O
= 20 V p-p
R
LOAD
≥ 500 Ω 4.7 6 4.7 6 4.7 6 MHz
Rise Time
5
A
VCL
= –2 10 10 10 ns
Overshoot
5
A
VCL
= –2 20 20 20 %
Slew Rate
5
A
VCL
= –2 300 375 300 375 300 375 V/µs
Settling Time
5
10 V Step
to 0.1% 80 80 80 ns
to 0.01% 100 100 100 ns
Differential Gain f = 4.4 MHz 0.015 0.015 0.015 %
Differential Phase f = 4.4 MHz 0.035 0.035 0.035 Degree
POWER SUPPLY
Rated Performance ±15 ± 15 ±15 V
Operating Range ⴞ5 ⴞ18 ⴞ5 ⴞ18 ⴞ5 ⴞ18 V
Quiescent Current 13/14 14/16 13 14 13 14 mA
T
MIN
–T
MAX
16/19.5 16 19 mA
Power Supply Rejection Ratio V
S
= ±5 V to ±18 V 86 100 90 105 86 100 dB
T
MIN
–T
MAX
80 86 80 dB
TEMPERATURE RANGE
Rated Performance
6
0 +75 0 +75 –55 +125 °C
PACKAGE OPTIONS
Plastic (N-14) AD842JN AD842KN
Cerdip (Q-14) AD842JQ AD842KQ AD842SQ, AD842SQ/883B
SOIC (R-16) AD842JR-16
Tape and Reel AD842JR-16-REEL
AD842JR-16-REEL7
TO-8 (H-12A) AD842JH AD842KH AD842SH
LCC (E-20A) AD842SE/883B
Chips AD842JCHIPS AD842SCHIPS
NOTES
1
AD842JR specifications differ from those of the AD842JN, JQ and JH due to the thermal characteristics of the SOIC package.
2
Standard Military Drawing available 5962-8964201xx
2A – (SE/883B); XA – (SH/883B); CA – (SQ/883B).
3
Input offset voltage specifications are guaranteed after 5 minutes at T
A
= +25°C.
4
Full power bandwidth = slew rate/2 π V
PEAK
.
5
Refer to Figures 22 and 23.
6
“S” grade T
MIN
–T
MAX
specifications are tested with automatic test equipment at T
A
= –55°C and T
A
= +125°C.
All min and max specifications are guaranteed. Specifications shown in boldface are tested on all production units.
Specifications subject to change without notice.
(@ +25ⴗC and ⴞ15 V dc, unless otherwise noted)