Datasheet
AD8426
Rev. 0 | Page 21 of 28
THEORY OF OPERATION
A3
R2
24.7k
R1
24.7k
A1 A2
Q2Q1
–IN
+IN
+V
S
–V
S
R3
50k
R4
50k
R5
50k
R
B
R
B
+V
S
–V
S
V
OUT
REF
NODE 1
NODE 2
R
G
V
BIAS
+
V
S
–V
S
+V
S
–V
S
NODE 4NODE 3
R6
50k
DIFFERENCE
AMPLIFIER STAGEGAIN STAGE
ESD AND
OVERVOLTAGE
PROTECTION
ESD AND
OVERVOLTAGE
PROTECTION
–V
S
0
9490-003
Figure 61. Simplified Schematic
ARCHITECTURE
The AD8426 is based on the classic 3-op-amp topology. This
topology has two stages: a gain stage (preamplifier) to provide
differential amplification, followed by a difference amplifier stage
to remove the common-mode voltage. Figure 61 shows a simplified
schematic of one of the instrumentation amplifiers in the AD8426.
The first stage works as follows. To maintain a constant voltage
across the bias resistor, R
B
, A1 must keep Node 3 at a constant
diode drop above the positive input voltage. Similarly, A2 keeps
Node 4 at a constant diode drop above the negative input voltage.
Therefore, a replica of the differential input voltage is placed
across the gain setting resistor, R
G
. The current that flows across
this resistance must also flow through the R1 and R2 resistors,
creating a gained differential signal between the A2 and A1 out-
puts. Note that, in addition to a gained differential signal, the
original common-mode signal, shifted up by a diode drop, is
also still present.
The second stage is a difference amplifier, composed of A3 and
four 50 kΩ resistors. The purpose of this stage is to remove the
common-mode signal from the amplified differential signal.
The transfer function of the AD8426 is
V
OUT
= G × (V
IN+
− V
IN−
) + V
REF
where:
GR
G
k49.4
1 +=
GAIN SELECTION
Placing a resistor across the R
G
terminals sets the gain of the
AD8426. The gain can be calculated by referring to Table 11
or by using the following gain equation:
1
k49.4
−
=
G
R
G
Table 11. Gains Achieved Using 1% Resistors
1% Standard Table Value of R
G
Calculated Gain
49.9 kΩ 1.990
12.4 kΩ 4.984
5.49 kΩ 9.998
2.61 kΩ 19.93
1.00 kΩ 50.40
499 Ω 100.0
249 Ω 199.4
100 Ω 495.0
49.9 Ω 991.0
The AD8426 defaults to G = 1 when no gain resistor is used.
The tolerance and gain drift of the R
G
resistor should be added
to the AD8426 specifications to determine the total gain accu-
racy of the system. When the gain resistor is not used, gain
error and gain drift are minimal.