Datasheet

AD8400/AD8402/AD8403
Rev. E | Page 7 of 32
Parameter Symbol Conditions Min Typ
1
Max Unit
DYNAMIC CHARACTERISTICS
6, 10
Bandwidth −3 dB BW_50 K R = 50 kΩ 125 kHz
BW_100 K R = 100 kΩ 71 kHz
Total Harmonic Distortion THD
W
V
A
= 1 V rms + 2 V dc, V
B
= 2 V dc, f = 1 kHz 0.003 %
V
W
Settling Time t
S
_50 K V
A
= V
DD
, V
B
= 0 V, ±1% error band 9 µs
t
S
_100 K V
A
= V
DD
, V
B
= 0 V, ±1% error band 18 µs
Resistor Noise Voltage e
NWB
_50 K
R
WB
= 25 kΩ, f = 1 kHz,
RS
= 0
20 nV/√Hz
e
NWB
_100 K
R
WB
= 50 kΩ, f = 1 kHz,
RS
= 0
29 nV/√Hz
Crosstalk
11
C
T
V
A
= V
DD
, V
B
= 0 V −65 dB
1
Typicals represent average readings at 25°C and V
DD
= 5 V.
2
Resistor position nonlinearity error R-INL is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper
positions. R-DNL measures the relative step change from ideal between successive tap positions. Parts are guaranteed monotonic. See the test circuit in Figure 38.
I
W
= V
DD
/R for V
DD
= 3 V or 5 V for the 50 kΩ and 100 kΩ versions.
3
V
AB
= V
DD
, wiper (V
W
) = no connect.
4
INL and DNL are measured at VW with the RDAC configured as a potentiometer divider similar to a voltage output D/A converter. V
A
= V
DD
and V
B
= 0 V.
DNL specification limits of ±1 LSB maximum are guaranteed monotonic operating conditions. See the test circuit in Figure 37.
5
Resistor Terminal A, Resistor Terminal B, and Resistor Terminal W have no limitations on polarity with respect to each other.
6
Guaranteed by design and not subject to production test. Resistor-terminal capacitance tests are measured with 2.5 V bias on the measured terminal. The remaining
resistor terminals are left open circuit.
7
Measured at the Ax terminals. All Ax terminals are open-circuited in shutdown mode.
8
Worst-case supply current consumed when input logic level at 2.4 V, standard characteristic of CMOS logic. See Figure 28 for a plot of I
DD
vs. logic voltage.
9
P
DISS
is calculated from (I
DD
× V
DD
). CMOS logic level inputs result in minimum power dissipation.
10
All dynamic characteristics use V
DD
= 5 V.
11
Measured at a V
W
pin where an adjacent V
W
pin is making a full-scale voltage change.