Datasheet

AD8366
Rev. A | Page 15 of 28
CIRCUIT DESCRIPTION
The AD8366 is a dual, differential, digitally controlled VGA
with 600 MHz of 3 dB bandwidth and a gain range of 4.5 dB to
20.25 dB adjustable in 0.25 dB steps. Using a proprietary variable
gain architecture, the AD8366 is able to achieve excellent linearity
(45 dBm) and noise performance (11.7 nV/√Hz) at 10 MHz at
minimum gain. Intended for use in direct conversion systems, the
part also includes dc offset correction that can be disabled easily
by grounding either OFSA or OFSB. In addition, the part offers
an adjustable output common-mode range of 1.6 V to 3 V.
The main signal path is shown in Figure 46. It consists of an
input transconductance, a variable-gain cell, and an output
transimpedance amplifier.
100Ω
100Ω
12.5Ω
12.5Ω
V
ARIABLE
CURRENT-GAIN
STAGE
OUTPUT
BUFFER
ZA
I
VIRTUAL
GROUND
VIRTUAL
GROUND
INP
INM
OUTP
OUTM
0
7584-071
Figure 46. Main Signal Path
The input transconductance provides a broadband 200 Ω
differential termination and converts the input voltage to a
current. This current is fed into the variable current-gain cell.
The output of this cell goes into the transimpedance stage, which
generates the output voltage. The transimpedance is fixed at 500 Ω,
with a roughly 25 Ω differential output impedance.
INPUTS
The inputs to the digitally-controlled VGAs in the AD8366 are
differential and can be either ac- or dc-coupled. The AD8366
synthesizes a 200 Ω (differential) input impedance, with a return
loss (re: 200 Ω) of better than 10 dB to 200 MHz. The nominal
common-mode input voltage to the part is V
POS
/2, but the AD8366
can be dc-coupled to parts with lower common modes if these
parts can sink current. The amount of current sinking required
depends on the input common-mode level and is given by
I
SINK
(per leg) = (V
POS
/2 − V
ICM
)/100
The input common-mode range is 1.5 V to V
POS
/2.
OUTPUTS
The outputs of the digitally-controlled VGAs are differential and
can be either ac- or dc-coupled. The AD8366 synthesizes a 25 Ω
differential output impedance, with a return loss (re: 25 Ω) of
better than 10 dB to 120 MHz. The nominal common-mode
output voltage is V
POS
/2; however, it can be lowered or raised by
driving the VCMA or VCMB pins.
OUTPUT DIFFERENTIAL OFFSET CORRECTION
To prevent significant levels of offset from appearing at the
outputs of the AD8366, each digitally controlled VGA has a
differential offset correction loop, as shown in Figure 47. This
loop senses any differential offset at the output and corrects for
it by injecting an opposing current at the input differential ground.
The loop is able to correct for input dc offsets of up to ±20 mV.
Because the loop automatically nulls out any dc or low frequency
offset, the effect of the loop is to introduce a high-pass corner into
the transfer function of the digitally controlled VGA. The
location of this high-pass corner depends on both the gain
setting and the value of the capacitor connected to the OFSx pin
(OFSA for DVGA A and OFSB for DVGA B) and is given by
()
()
()
102π
40001.0374300
kHz
,3
+
+
=
OFS
GC
HPdB
C
f
where:
GC is the gain code (a value from 0 to 63).
C
OFS
is the value of the capacitance connected to OFSA or OFSB,
in picofarads (pF).
The offset correction loop can be disabled by grounding either
OFSA or OFSB.
g
m1
g
m2
INP
INM
OFFSET
COMPENSATION
LOOP
V
A
RIABLE-GAIN
STAGE
OUTPUT
BUFFER
ZA
I
OUTP
OUTM
C
OFS
07584-073
Figure 47. Differential Offset Correction Loop
OUTPUT COMMON-MODE CONTROL
To interface to ADCs that require different input common-mode
voltages, the AD8366 has an adjustable output common-mode
level. The output common-mode level is normally set to V
POS
/2;
however, it can be changed between 1.6 V and 3 V by driving
the VCMA pin or the VCMB pin. The input equivalent circuit
for the VCMA pin is shown in Figure 48; the VCMB pin has the
same input equivalent circuit.
4kΩ
500Ω
V
POS
/2
VCMA
07584-072
Figure 48. Input Equivalent Circuit for VCMA