Datasheet
AD8352
Rev. B | Page 17 of 20
EVALUATION BOARD SCHEMATICS
0
5728-017
J2J1
51
42 3
C12
0.1µF
C11
0.1µF
T3
51
42 3
T4
+
C7
0.1µF
C1
10µF
C6
0.1µF
VPOS
VPOS
RED
LOCATE CAPS NEAR DUT
Z1
VPOS
R19
0Ω
R18
0Ω
ENBL
YELLOW
YELLOW
BLACK
GND
SWITCH_SPDT
VCM
VCM
ENB
C9
0.1µF
C10
0.1µF
VPOS
R20
0Ω
R1
OPEN
R4
0Ω
R2
25Ω
R5
0Ω
R3
25Ω
R6
0Ω
VINP
VINN
T2
4
15
23
M/A_COM
ETC1-1-13
C2
0.1µF
C3
0.1µF
C
D
0.2pF
R
D
4.32kΩ
R
G
115Ω
1
2
3
4
12
11
10
9
RDP
VIP
VIN
RGP
RGN
RDN
GND
VOP
VON
GND
VPOS
16 15 14 13
5678
ENB
VCM
VCC
GND
GND
VCC
AD8352
R7
0Ω
R8
86.6Ω
R12
86.6Ω
R11
0Ω
R9
57.6Ω
C4
0.1µF
C5
0.1µF
T1
4
15
23
M/A_COM
ETC1-1-13
R14
OPEN
R13
0Ω
VOUTP
VOUTN
50Ω TRACES50Ω TRACES
HIGH IMPEDANCE TRACES
(OPEN PLANES UNDER TRACES)
SW1
CALIBRATION CIRCUIT BYPASS CIRCUIT
C8
0.1µF
Figure 38. AD8352 Evaluation Board, Version A01212A