Inc. Mixer User Manual

ManualsBrandsAnalog Devices ManualsMixerAD8342

Active Receive Mixer

LF to 500 MHz

AD8342

Rev. 0

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Tel: 781.329.4700

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FEATURES

Broadband RF port: LF to 500 MHz

Conversion gain: 3.7 dB

Noise figure: 12.2 dB

Input IP3: 22.7 dBm

Input P

1dB

: 8.3 dBm

LO drive: 0 dBm

Differential high impedance RF input port

Single-ended, 50 Ω LO input port

Single-supply operation: 5 V @ 98 mA

Power-down mode

Exposed paddle LFCSP: 3 mm × 3 mm

APPLICATIONS

Cellular base station receivers

ISM receivers

Radio links

RF instrumentation

FUNCTIONAL BLOCK DIAGRAM

COMM

IFOP

IFOM

COMM

RFCM

RFIN

VPMX

VPDC PWDN EXRB COMM

VPLO LOCM LOIN COMM

BIAS

AD8342

05352-001

Figure 1.

GENERAL DESCRIPTION

The AD8342 is a high performance, broadband active mixer.

It is well suited for demanding receive-channel applications

that require wide bandwidth on all ports and very low inter-

modulation distortion and noise figure.

The AD8342 provides a typical conversion gain of 3.7 dB with

an RF frequency of 238 MHz. The integrated LO driver presents

a 50 Ω input impedance with a low LO drive level, helping to

minimize the external component count.

The differential high impedance broadband RF port allows for

easy interfacing to both active devices and passive filters. The

RF input accepts input signals as large as 1.6 V p-p or 8 dBm

(relative to 50 Ω) at P

1dB

The open-collector differential outputs provide excellent bal-

ance and can be used with a differential filter or IF amplifier,

such as the AD8369 or AD8351. These outputs can also be con-

verted to a single-ended signal through the use of a matching

network or a transformer (balun). When centered on the VPOS

supply voltage, the outputs may swing ±2 V differentially.

The AD8342 is fabricated on an Analog Devices proprietary,

high performance SiGe IC process. The AD8342 is available in a

16-lead LFCSP. It operates over a −40°C to +85°C temperature

range. An evaluation board is also available.

Summary of content (20 pages)

PAGE 1
Active Receive Mixer LF to 500 MHz AD8342 Broadband RF port: LF to 500 MHz Conversion gain: 3.7 dB Noise figure: 12.2 dB Input IP3: 22.7 dBm Input P1dB: 8.
PAGE 2
AD8342 TABLE OF CONTENTS Specifications..................................................................................... 3 AC Interfaces................................................................................... 15 AC Performance ............................................................................... 4 IF Port .......................................................................................... 16 Spur Table .......................................................................
PAGE 3
AD8342 SPECIFICATIONS VS = 5 V, TA = 25°C, fRF = 238 MHz, fLO = 286 MHz, LO power = 0 dBm, ZO = 50 Ω, RBIAS = 1.82 kΩ, RF termination = 100 Ω, IF terminated into 100 Ω through a 2:1 ratio balun, unless otherwise noted. Table 1.
PAGE 4
AD8342 AC PERFORMANCE VS = 5 V, TA = 25°C, LO power = 0 dBm, ZO = 50 Ω, RBIAS = 1.82 kΩ, RF termination 100 Ω, IF terminated into 100 Ω via a 2:1 ratio balun, unless otherwise noted. Table 2.
PAGE 5
AD8342 SPUR TABLE VS = 5 V, TA = 25°C, RF and LO power = 0 dBm, fRF = 238MHz, fLO = 286MHz, ZO = 50 Ω, RBIAS = 1.82 kΩ, RF termination 100 Ω, IF terminated into 100 Ω via a 2:1 ratio balun. Note: Measured using standard test board. Typical noise floor of measurement system = −100 dBm. Table 3. m n nfRF − mfLO 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 <−100 −39 −52 −81 −78 −98 <−100 <−100 <−100 <−100 <−100 <−100 <−100 <−100 <−100 <−100 −25 3.
PAGE 6
AD8342 ABSOLUTE MAXIMUM RATINGS Table 4. Parameter Supply Voltage, VS RF Input Level LO Input Level PWDN Pin IFOP, IFOM Bias Voltage Minimum Resistor from EXRB to COMM Internal Power Dissipation θJA Maximum Junction Temperature Operating Temperature Range Storage Temperature Range Rating 5.5 V 12 dBm 12 dBm VS + 0.5 V 5.5 V 1.8 kΩ 650 mW 77°C/W 135°C −40°C to +85°C −65°C to +150°C Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device.
PAGE 7
AD8342 12 VPDC 11 PWDN 10 EXRB 05352-002 9 COMM COMM 8 14 RFCM IFOP 7 TOP VIEW (Not to Scale) COMM 5 COMM 4 AD8342 IFOM 6 LOIN 3 13 COMM PIN 1 INDICATOR VPLO 1 LOCM 2 15 RFIN 16 VPMX PIN CONFIGURATION AND FUNCTION DESCRIPTIONS Figure 2. 16-Lead LFCSP Table 5. Pin Function Descriptions Pin No. 1 2 3 Mnemonic VPLO LOCM LOIN 4, 5, 8, 9, 13 6, 7 10 COMM IFOM, IFOP EXRB 11 12 14 15 16 PWDN VPDC RFCM RFIN VPMX Function Positive Supply Voltage for the LO Buffer: 4.75 V to 5.25 V.
PAGE 8
AD8342 TYPICAL PERFORMANCE CHARACTERISTICS VS = 5 V, TA = 25°C, RF power = −10 dBm, LO power = 0 dBm, ZO = 50 Ω, RBIAS = 1.82 kΩ, RF termination 100 Ω, IF terminated into 100 Ω via a 2:1 ratio balun, unless otherwise noted. 6 6 5 5 GAIN (dB) 3 RF = 238MHz 4 GAIN (dB) IF = 48MHz 4 RF = 460MHz 3 IF = 140MHz IF = 10MHz IF = 90MHz 05352-004 1 50 100 150 200 250 300 350 400 450 500 05352-005 2 2 1 10 550 50 100 150 200 250 300 RF FREQUENCY (MHz) IF FREQUENCY (MHz) Figure 3.
PAGE 9
AD8342 27 27 26 26 25 25 IF = 48MHz 24 IF = 90MHz IF = 10MHz INPUT IP3 (dBm) 23 22 21 IF = 140MHz 20 23 RF = 238MHz 21 20 18 17 50 100 150 200 250 300 350 400 450 18 17 10 550 500 50 100 150 300 Figure 9. Input IP3 vs. RF Frequency Figure 12. Input IP3 vs. IF Frequency 27 26 25 350 25 IF = 48MHz 24 IF = 10MHz INPUT IP3 (dBm) 24 23 22 21 140MHz IF = 90MHz 23 22 21 20 19 19 05352-027 20 18 –13 –11 –9 –7 –5 –3 –1 1 18 17 4.75 5 3 4.80 4.85 4.90 4.
PAGE 10
AD8342 13 10 12 9 11 8 9 8 48MHz 7 140MHz 6 7 INPUT P1dB (dBm) RF = 238MHz 6 5 4 3 5 4 100 150 200 250 300 350 400 450 500 1 0 550 10 300 350 9 IF = 10MHz IF = 90MHz 8 8.0 IF = 140MHz 7.5 7 INPUT P1dB (dBm) INPUT P1dB (dBm) 250 10 IF = 48MHz 7.0 6.5 6 5 4 3 6.0 05352-038 2 5.5 –13 –11 –9 –7 –5 –3 –1 1 1 0 4.75 5 3 4.85 LO LEVEL (dBm) 4.95 5.05 5.15 5.25 VPOS (V) Figure 19. Input P1dB vs. Vpos, fRF = 238 MHz, fLO = 286 MHz Figure 16.
PAGE 11
AD8342 60 60 IF = 90MHz IF = 10MHz RF = 238MHz IF = 140MHz 50 40 INPUT IP2 (dBm) 40 IF = 48MHz 30 20 30 20 0 100 150 200 250 300 350 400 450 0 10 550 500 05352-011 10 05352-010 10 50 100 200 250 300 350 IF FREQUENCY (MHz) Figure 21. Input IP2 vs. RF Frequency (Second RF = R F - 50 MHz) Figure 24. Input IP2 vs.
PAGE 12
AD8342 16 30 15 25 20 PERCENTAGE 14 NF = 140MHz NF (dB) NORMAL MEAN = 12.25 STD. DEV. = 0.14 NF PERCENTAGE NF = 90MHz 13 15 12 10 NF = 10MHz NF = 48MHz 10 –15 –13 –11 –9 –7 –5 –3 –1 1 3 05352-023 5 05352-018 11 0 11.8 5 11.9 12.0 12.1 12.2 12.3 12.4 12.5 12.6 12.7 12.8 LO POWER (dBm) NOISE FIGURE (dB) Figure 27. Noise Figure vs. LO Power, fRF = 238 MHz Figure 30. Noise Figure Distribution, fRF = 238 MHz, fLO = 286 MHz 105 30 5.
PAGE 13
AD8342 0 120 –10 100 SUPPLY CURRENT (mA) –20 LEAKAGE (dBc) –30 –40 –50 –60 80 60 40 –70 –90 50 250 450 650 05352-034 05352-021 20 –80 0 –40 850 –20 0 LO FREQUENCY (MHz) 40 60 80 Figure 36. Supply Current vs. Temperature 0 0 –5 –2 –10 –4 RETURN LOSS (dB) –15 –20 IF = 10MHz –30 –35 –6 –8 –10 –12 –40 05352-035 –14 IF = 48MHz –45 50 100 150 200 250 300 350 400 450 500 05352-059 FEEDTHROUGH (dBc) Figure 33. LO to RF Leakage vs.
PAGE 14
AD8342 CIRCUIT DESCRIPTION The AD8342 is an active mixer optimized for operation within the input frequency range of near dc to 500 MHz. It has a differential, high impedance RF input that can be terminated or matched externally. The RF input can be driven either singleended or differentially. The LO input is a single-ended 50 Ω input. The IF outputs are differential open-collectors.
PAGE 15
AD8342 AC INTERFACES Table 4. Dynamic Performance for Various Input Networks Input Network Gain (dB) IIP3 (dBm) P1dB (dBm) NF (dB) 50 Ω Shunt 0.66 25.4 10.8 14 100 Ω Shunt 3.5 22.9 8.4 12.5 500 Ω Shunt 5.3 20. 6 6.3 10.2 Matched (Fig. 40) 9.3 18.5 2.3 10.5 The RF port can also be matched using an LC circuit, as shown in Figure 42. 50Ω The AD8342 is designed to operate over a broad frequency range.
PAGE 16
AD8342 IF PORT The IF port comprises open-collector differential outputs. The NPN open collectors can be modeled as current sources that are shunted with resistances of ~10 kΩ in parallel with capacitances of ~1 pF. The specified performance numbers for the AD8342 were measured with 100 Ω differential terminations. However, different load impedances may be used where circumstances dictate. In general, lower load impedances result in lower conversion gain and lower output P1dB.
PAGE 17
AD8342 30 +VS AD8342 MODELED 25 COMM 8 IF OUT ZO = 50Ω VOLTAGE GAIN (dB) 2:1 IFOP 7 COMM 5 ZL = 100Ω 05352-047 IFOM 6 Figure 47. Biasing the IF Port Open-Collector Outputs Using a Center-Tapped Impedance Transformer +VS 20 MEASURED 15 10 05352-057 5 AD8342 0 10 RFC IF OUT+ IFOP 7 ZL = 100Ω IFOM 6 IMPEDANCE TRANSFORMING NETWORK Figure 49. Voltage Conversion Gain vs.
PAGE 18
AD8342 HIGH IF APPLICATIONS production concerns due to the sensitivity of the match. For this application, it is advantageous to shunt down the ~1 kΩ input impedance using an external shunt termination resistor to allow for a lower Q reactive matching network. The input is terminated across the RFIN and RFCM pins using a 499 Ω termination. The termination should be as close to the device as possible to minimize standing wave concerns. The RFCM is bypassed to ground using a 1 nF capacitor.
PAGE 19
AD8342 EVALUATION BOARD An evaluation board is available for the AD8342. The evaluation board is configured for single-ended signaling at the IF output port via a balun transformer. The schematic for the evaluation board is presented in Figure 53. R8 PWDN C11 100pF 10kΩ W1 GND VPOS VPOS R7 C12 0.1µF 0Ω R6 R9 0Ω 1.
PAGE 20
AD8342 Preliminary Technical Data OUTLINE DIMENSIONS 3.00 BSC SQ 0.60 MAX 13 12 0.45 PIN 1 INDICATOR TOP VIEW 2.75 BSC SQ 0.80 MAX 0.65 TYP 12° MAX SEATING PLANE 16 PIN 1 INDICATOR *1.65 1 1.50 SQ 1.35 EXPOSED PAD 0.50 BSC 0.90 0.85 0.80 0.50 0.40 0.30 9 (BOTTOM VIEW) 4 8 5 0.25 MIN 1.50 REF 0.05 MAX 0.02 NOM 0.30 0.23 0.18 0.20 REF *COMPLIANT TO JEDEC STANDARDS MO-220-VEED-2 EXCEPT FOR EXPOSED PAD DIMENSION. Figure 54.