Datasheet

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Low Power, 18 MHz Variable Gain Amplifier

Data Sheet

AD8338

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FEATURES

Voltage controlled gain range of 0 dB to 80 dB

3 mA supply current at gain of 40 dB

Low frequency (LF) to 18 MHz operation

Supply range: 3.0 V to 5.0 V

Low noise: 4.5 nV/

√

Hz at 80 dB gain

Fully differential signal path

Offset correction (offset null) feature

Internal 1.5 V reference

16-lead LFCSP

Automatic gain control feature

Wide gain range for high dynamic range signals

APPLICATIONS

Front end for inductive telemetry systems

Ultrasonic signal receivers

Signal compression for driving an ADC

AGC amplifiers

GENERAL DESCRIPTION

The AD8338 is a variable gain amplifier (VGA) for applications

that require a fully differential signal path, low power, low noise,

and a well-defined gain over frequency. While the inputs are

differential, the device can also be driven with a single-ended

source if required.

The basic gain function is linear-in-dB and is controlled by the

voltage applied to Pin GAIN. The nominal gain range spans

from 0 dB to 80 dB for control voltages between 0.1 V to 1.1 V

with a slope of 12.5 mV/dB. The nominal gain range can be

shifted up or down via direct access to Pin INPD and Pin INMD,

the current inputs of the VGA. For example, driving the INPD

and INMD pins with 50 Ω resistors shifts the gain range up by

20 dB, that is, 20 dB to 100 dB, and lowers the input referred

noise of the device to 1.5 nV/√Hz. Additionally, the gain slope

can be inverted via logic Pin MODE.

The AD8338 includes additional circuit blocks to enable input

offset correction and automatic gain control (AGC). DC offset

voltages are removed by the offset correction circuit, which

behaves like a high-pass filter whose corner is set with an

external capacitor. The AGC function varies the gain of the

AD8338 to maintain a constant RMS output voltage. An

externally applied voltage to Pin VAGC with respect to the

voltage at Pin VREF sets the output RMS amplitude. A

capacitor from Pin DETO to ground sets the response time

of the AGC circuit.

FUNCTIONAL BLOCK DIAGRAM

Figure 1.

Figure 2. Gain vs. Frequency

The AD8338 offers additional versatility by providing access to

the internal summing nodes of the VGA core and the output

amplifiers. With the addition of a few external passive

components, users can customize the gain, bandwidth, input

impedance, and noise profile of the part to fit their application.

The AD8338 uses a single supply voltage of 3.0 V to 5.0 V and

is very power efficient, consuming as little as 3 mA quiescent

current at mid gain. The AD8338 is available in a 3 mm ×

3 mm, RoHS compliant, 16-lead LFCSP and is specified over

the industrial temperature range of −40°C to +85°C.

INPR

INPD

INMD

INMR

MODECOMM GAIN

FBKM

OUTP

OUTM

DETO VAGC

FBKP

–

VREF

VGA CORE

0dB TO 80dB

OFFSET NULL

OUTPUT

STAGE

0dB

OFSN

VREF

VBAT

AUTOMATIC

GAIN

CONTROL

GAIN INTERFACE

AD8338

11279-001

100

–40

–20

10k 100M10M1M100k

GAIN (dB)

FREQUENCY (Hz)

GAIN

= 0.1V

GAIN

= 0.2V

GAIN

= 0.3V

GAIN

= 0.4V

GAIN

= 0.5V

GAIN

= 0.6V

GAIN

= 0.7V

GAIN

= 0.8V

GAIN

= 0.9V

GAIN

= 1.0V

GAIN

= 1.1V

11279-005

Summary of content (20 pages)

PAGE 1
FEATURES FUNCTIONAL BLOCK DIAGRAM VBAT OFSN VREF OFFSET NULL AD8338 VGA CORE INPR + INMR – OUTP + OUTPUT STAGE 0dB – OUTM 0dB TO 80dB VREF INPD Front end for inductive telemetry systems Ultrasonic signal receivers Signal compression for driving an ADC AGC amplifiers COMM MODE GAIN FBKM AUTOMATIC GAIN CONTROL GAIN INTERFACE INMD APPLICATIONS DETO VAGC Figure 1. 100 GENERAL DESCRIPTION 80 The basic gain function is linear-in-dB and is controlled by the voltage applied to Pin GAIN.
PAGE 2
AD8338 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Typical Performance Characteristics ..............................................6 Applications ....................................................................................... 1 Theory of Operation ...................................................................... 12 General Description ...............................................................
PAGE 3
Data Sheet AD8338 SPECIFICATIONS AC SPECIFICATIONS VBAT = 3.0 V, TA = 25°C, CL = 2 pF on OUTP and OUTM, RL = ∞, MODE pin high, RIN = 2 × 500 Ω, VGAIN = 0.6 V, differential operation, unless otherwise noted. Table 1.
PAGE 4
AD8338 Data Sheet ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE Table 2. Parameter VBAT to COMM INPR, INPD, INMD, INMR, MODE, GAIN, FBKM, FBKP, OUTM, OUTP, VAGC, VREF, OFSN Operating Temperature Range Storage Temperature Range Maximum Junction Temperature Lead Temperature (Soldering, 10 sec) Rating −0.3 V to +5.5 V COMM to VBAT Table 3.
PAGE 5
Data Sheet AD8338 14 OFSN 13 VAGC 16 VREF 15 VBAT PIN CONFIGURATION AND FUNCTION DESCRIPTIONS 12 FBKP INPR 1 INPD 2 AD8338 11 OUTP INMD 3 TOP VIEW (Not to Scale) 10 OUTM INMR 4 NOTES 1. THE EXPOSED PAD SHOULD BE TIED TO A QUIET ANALOG GROUND. 11279-002 GAIN 7 FBKM DETO 8 MODE 6 COMM 5 9 Figure 3. Pin Configuration Table 4. Pin Function Descriptions Pin No.
PAGE 6
AD8338 Data Sheet TYPICAL PERFORMANCE CHARACTERISTICS VBAT = 3.0 V, TA = 25°C, CL = 2 pF on OUTP and OUTM, RL = ∞, MODE pin high, RIN = 2 × 500 Ω, VGAIN = 0.6 V, differential operation; unless otherwise noted. 80 80 70 MODE PIN LOW 60 MODE PIN HIGH 60 40 GAIN (dB) GAIN (dB) 50 40 VGAIN = 600mV VGAIN = 350mV VGAIN = 100mV 20 0 30 –20 20 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 VGAIN (V) –60 100k 11279-003 0 0.1 100M Figure 7. Gain vs.
PAGE 7
Data Sheet AD8338 1.0 5 0.5 4 3 OFFSET VOLTAGE (mV) REFERRED TO OUTPUT –1.0 –1.5 10kHz 100kHz 1MHz 2MHz 4MHz 8MHz 10MHz 12MHz 14MHz –2.0 –2.5 –3.0 –3.5 0.1 0.2 2 1 0 –1 –2 –3 –4 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 VGAIN (V) –5 0.1 –40°C +25°C +85°C +105°C 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 11279-012 –0.5 11279-007 GAIN ERROR (dB) 0 1.1 VGAIN (V) Figure 13. Differential Offset Voltage vs. VGAIN, Offset Null On Figure 10. Gain Error vs.
PAGE 8
AD8338 Data Sheet 0 1k –10 GAIN = 1, OFSN DISABLED –20 100 GAIN = 10, OFSN DISABLED NOISE (nV/ Hz) CMRR (dB) –30 –40 –50 –60 GAIN = 100, OFSN DISABLED 10 GAIN = 1000, OFSN ENABLED GAIN = 10000, OFSN ENABLED –70 0dB 20dB 40dB 60dB 80dB –100 10k 100k 1M 10M 0.1 10k FREQUENCY (Hz) 1M 10M 100M FREQUENCY (Hz) Figure 16. CMRR vs. Frequency over Gain, Offset Null On, Referred to Input Figure 19. Input Referred Noise vs.
PAGE 9
Data Sheet AD8338 0 0 –10 –10 –20 –20 IMD3 DISTORTION (dBc) –30 –40 HD3, MODE PIN LOW –50 HD3, MODE PIN HIGH HD2, MODE PIN LOW –60 –30 –40 –50 –60 HD2, MODE PIN HIGH 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 VGAIN (V) –80 20k 11279-123 –80 0.1 2M 20M FREQUENCY (Hz) Figure 25. IMD3 Distortion vs. Frequency Figure 22. Harmonic Distortion vs. VGAIN 2.0 20 VOUT = 2V p-p f = 1MHz GAIN = 0dB OUTPUT 10 1.5 0 1.0 –10 0.
PAGE 10
AD8338 Data Sheet 1.5 2.0 f = 100kHz VIN LOW = 2mV VIN HIGH = 20mV 1.0 GAIN = 40dB VOUT = 2V p-p f = 1MHz GAIN = 40dB 1.5 OUTPUT VOLTAGE (V) 1.0 VOUT (V) 0.5 0 –0.5 0.5 0 –0.5 –1.0 –1.0 0 0.2 0.4 0.6 0.8 TIME (µs) –1.5 11279-030 –2.0 0 20 60 100 120 140 160 180 200 12 –40°C, MODE PIN HIGH +25°C, MODE PIN HIGH +85°C, MODE PIN HIGH –40°C, MODE PIN LOW +25°C, MODE PIN LOW +85°C, MODE PIN LOW 10 40 8 20 IDD (mA) 0 –20 6 4 –40 –60 2 VOUT = 100mV p-p f = 1.
PAGE 11
Data Sheet AD8338 3.0 OUTPUT COMMON-MODE VOLTAGE (V) –10 –20 PSRR (dB) –30 –40 –50 –60 –70 –80 1k 10k 100k 1M 10M FREQUENCY (Hz) 2.0 1.5 VS = 3V 1.0 VS = 5V 0.5 0 20k 11279-133 –90 –100 100 2.5 100k RESISTANCE (Ω) Figure 34. PSRR vs. Frequency 11279-135 0 Figure 37. Output Common-Mode Voltage vs. RCM to VBAT 3.0 0.1 OUTPUT VOLTAGE 1.0 0 0 5 10 15 20 25 30 35 40 TIME (µs) 11279-019 –1.0 Figure 35. AGC Response vs.
PAGE 12
AD8338 Data Sheet THEORY OF OPERATION INTRODUCTION VGA CORE The AD8338 is a single supply variable gain amplifier (VGA) with an adjustable gain range of 80 dB. More accurately, the AD8338 is an input variable gain amplifier (IVGA), which has been designed to accept a wide range of input amplitudes, and via its variable gain, compress it to either a narrow range of output amplitudes or a constant output amplitude (for example, automatic gain control applications).
PAGE 13
Data Sheet AD8338 NORMAL OPERATING CONDITIONS Normal operating conditions for the AD8338 are defined as follows: • • • +VOUT/2 + VREF 500Ω INPD The input pins, INPR and INMR, are voltage driven (the source impedance is assumed to be zero). The output pins, OUTP and OUTM, are open circuited (the load impedance is assumed to be infinite). Pin COMM is grounded. Pin MODE is either tied to a logic high or left unconnected, to set the noninverted gain slope gain mode. lD IIN 1.
PAGE 14
AD8338 Data Sheet Linear-in-dB Gain Control, GAIN Pin Offset Correction Circuit, OFSN Pin To facilitate the use of an 80 dB gain range, the AD8338 has a linear-in-dB gain control. The gain is controlled by the voltage at Pin GAIN with respect to the local ground COMM. In normal operating conditions, adjusting the voltage at Pin GAIN from 0.1 V to 1.1 V adjusts the gain from its lowest value of 0 dB to its highest value of 80 dB.
PAGE 15
Data Sheet AD8338 AGC Circuit, VAGC Pin OUTPUT AMPLITUDE (mV rms) In this configuration, the AGC circuit compares the RMS output amplitude of the VGA with the desired RMS output amplitude (voltage at Pin VAGC with respect to the voltage at Pin VREF), and drives Pin GAIN to minimize their difference. Therefore, in steady state conditions, the circuit forces the RMS output amplitude of the AD8338 to be the voltage at Pin VAGC with respect to the voltage at Pin VREF.
PAGE 16
AD8338 Data Sheet EXPLANATION OF THE GAIN FUNCTION Equation 8 and Equation 9 show that the gain range of the AD8338 can be shifted by using external input resistors, RP and RN. For example, driving the INPD and INMD pins with an RP and RN of 50 Ω shifts the gain range of the AD8338 up by 20 dB, from 20 dB to 100 dB (see Figure 43). Similarly, driving the INPD and INMD pins with an RP and RN of 5 kΩ, shifts the gain range down by 20 dB, from −20 dB to +60 dB.
PAGE 17
Data Sheet AD8338 ADJUSTING THE OUTPUT COMMON-MODE VOLTAGE FBKP 9.5kΩ FBKP OUTP = 1.5V – R1 lOUT 9.5kΩ (0 – 1.5V) × 9.5kΩ R2 + VOUT/2 R2 VBAT FBKM COMM Figure 48. Increasing the Output Common-Mode Voltage OUTP = 1.5V – (VBAT – 1.5V) × 9.5kΩ R1 Table 5 and Table 6 show suggested values for the external resistors shown in Figure 47 and Figure 48. + VOUT/2 Table 5. Resistor Values for Decreasing the Output Common-Mode Voltage VREF = 1.5V OUTM = 1.5V – 9.5kΩ (VBAT – 1.5V) × 9.
PAGE 18
AD8338 Data Sheet APPLICATIONS INFORMATION The AD8338 amplifies the signal (the gain is set by an external controller) and drives a full-wave rectifier bridge. The output of this bridge is then low-pass filtered into 100 Ω terminations. This design provides excellent rejection of RF and excellent baseband information recovery for the decision stage that follows.
PAGE 19
Data Sheet AD8338 The AD8338 can be coupled directly to the AD7450 for full dc-to-18 MHz operation at the highest level of performance with low operating power (160 mW typical). The glueless interface enables a physically small, high performance data acquisition system that is ideal for many field instruments. A filter before the VGA provides the antialiasing function and noise limiting.
PAGE 20
AD8338 Data Sheet OUTLINE DIMENSIONS PIN 1 INDICATOR 0.30 0.23 0.18 0.50 BSC 13 PIN 1 INDICATOR 16 1 12 EXPOSED PAD 1.75 1.60 SQ 1.45 9 TOP VIEW 0.80 0.75 0.70 0.50 0.40 0.30 4 8 0.25 MIN BOTTOM VIEW 0.05 MAX 0.02 NOM COPLANARITY 0.08 0.20 REF SEATING PLANE 5 FOR PROPER CONNECTION OF THE EXPOSED PAD, REFER TO THE PIN CONFIGURATION AND FUNCTION DESCRIPTIONS SECTION OF THIS DATA SHEET. COMPLIANT TO JEDEC STANDARDS MO-220-WEED-6. 08-16-2010-E 3.10 3.00 SQ 2.90 Figure 51.