Datasheet

AD8337
Rev. C | Page 21 of 32
–600
–200
0
0
600
400
–20
–400
TIME (ns)
–10 302010 50 6040 80
V
IN
(mV)
–60
0
–20
20
60
40
–40
200
OUTPUT
800
–800
70
80
–80
05575-070
V
OUT
(mV)
INPUT
C
L
= 0pF
C
L
= 10pF
C
L
= 22pF
NO SNUBBING RESISTOR
Figure 70. Pulse Response for Two Values of Output Capacitance
with ±2.5 V Supplies and No Snubbing Resistor
C
L
= 0pF
C
L
= 10pF
C
L
= 22pF
WITH 20Ω SNUBBING RESISTOR
V
OUT
(mV)
–600
–200
0
0
600
400
–20
–400
TIME (ns)
–10 302010 50 6040 80
V
IN
(mV)
–60
0
–20
20
60
40
–40
200
INPUT
OUTPUT
800
–800
70
80
–80
05575-071
Figure 71. Pulse Response for Two Values of Output Capacitance
with ±2.5 V Supplies and a 20 Ω Snubbing Resistor
C
L
= 0pF
C
L
= 10pF
C
L
= 22pF
WITH NO SNUBBING RESISTOR
V
OUT
(mV)
–600
–200
0
0
600
400
–20
–400
TIME (ns)
–10 302010 50 6040 80
–60
0
–20
20
60
40
–40
200
INPUT
OUTPUT
800
–800
70
–80
80
V
S
= ±5V
V
IN
(mV)
05575-072
Figure 72. Large Signal Pulse Response for Two Values of Output
Capacitance with ±5 V Supplies and No Snubbing Resistor
C
L
= 0pF
C
L
= 10pF
C
L
= 22pF
WITH 20Ω SNUBBING RESISTOR
V
OUT
(mV)
–600
–200
0
0
600
400
–20
–400
TIME (ns)
–10 302010 50 6040 80
–60
0
–20
20
60
40
–40
200
INPUT
OUTPUT
800
–800
70
–80
80
V
IN
(mV)
V
S
= ±5V
05575-073
Figure 73. Pulse Response for Two Values of Output Capacitance
with ±5 V Supplies and a 20 Ω Snubbing Resistor
The effects of stray output capacitance are mitigated with a
small value snubbing resistor, R
SNUB
, placed in series with, and
as near as possible to, the VOUT pin. Figure 69, Figure 71, and
Figure 73 show the improvement in dynamic performance with
a 20  snubbing resistor. R
SNUB
reduces the gain slightly by the
ratio of R
L
/(R
SNUB
+ R
L
), a very small loss when used with high
impedance loads, such as ADCs. For other loads, alternate values
of R
SNUB
can be determined empirically. The data for the curves in
the Typical Performance Characteristics section are derived using
a 20 Ω snubbing resistor.
The best way to avoid the effects of stray capacitance is to
exercise care in the PCB layout. Locate the passive components
or devices connected to the AD8337 output pins as close as
possible to the package.
Although a nonissue, the preamplifier output is also sensitive to
load capacitance. However, the series connection of R
FB1
and
R
FB2
is typically the only load connected to the preamplifier. If
overshoot appears, it can be mitigated by inserting a snubbing
resistor, the same way as the VGA output.
GAIN CONTROL CONSIDERATIONS
In typical applications, voltages applied to the GAIN input are dc
or relatively low frequency signals. The high input impedance of
the AD8337 enables several devices to be connected in parallel.
This is useful for arrays of VGAs, such as those used for calibra-
tion adjustments.
Under dc or slowly changing ramp conditions, the gain tracks
the gain control voltage, as shown in Figure 3. However, it is often
necessary to consider other effects influenced by the V
GAIN
input.