Datasheet

AD8331/AD8332/AD8334
Rev. G | Page 8 of 56
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
03199-003
MODE
VIP
GAIN
VIN
LOP
COML
LMD
LON
VPSL
INH
1
2
3
4
5
6
7
8
9
10
RCLMP
COMM
VOH
ENBV
VCM
VPOS
VOL
HILO
ENBL
COMM
20
19
18
17
16
15
14
13
12
11
AD8331
TOP VIEW
(Not to Scale)
PIN 1
INDICATOR
Figure 3. 20-Lead QSOP Pin Configuration (AD8331)
Table 3. 20-Lead QSOP Pin Function Description (AD8331)
Pin No. Mnemonic Description
1 LMD LNA Midsupply Bypass Pin; Connect a Capacitor for Midsupply HF Bypass
2 INH LNA Input
3 VPSL LNA 5 V Supply
4 LON LNA Inverting Output
5 LOP LNA Noninverting Output
6 COML LNA Ground
7 VIP VGA Noninverting Input
8 VIN VGA Inverting Input
9 MODE Gain Slope Logic Input
10 GAIN Gain Control Voltage
11 VCM Common-Mode Voltage
12 RCLMP Output Clamping Level
13 HILO Gain Range Select (HI or LO)
14 VPOS VGA 5 V Supply
15 VOH Noninverting VGA Output
16 VOL Inverting VGA Output
17 COMM VGA Ground
18 ENBV VGA Enable
19 ENBL LNA Enable
20 COMM VGA Ground