Datasheet
REV. A
AD8300
–5–
2.5
2.0
0
01 645
0.5
1.0
1.5
23
V
DD
SUPPLY VOLTAGE – Volts
LOGIC THRESHOLD VOLTAGE
T
A
= –40 TO +858C
Figure 5. Logic Input Threshold
Voltage vs. V
DD
50
45
0
10 100 1M10k 100k
40
35
30
25
20
15
10
5
1k
FREQUENCY – Hz
POWER SUPPLY REJECTION – dB
V
DD
= +3V 610%
V
DD
= +5V 610%
T
A
= +258C
DATA = FFF
H
Figure 8. Power Supply Rejection
vs. Frequency
CODE 800
H
TO 7FF
H
Figure 11. Midscale Transition
Performance
80
40
–80
02
1
–40
0
60
20
–60
–20
OUTPUT VOLTAGE – Volts
OUTPUT CURRENT – mA
V
DD
= +3V
V
DD
= +5V
V
DD
= +3V
V
DD
= +5V
POSITIVE
CURRENT
LIMIT
NEGATIVE
CURRENT
LIMIT
DATA = 800
H
R
L
TIED TO +1.024V
Figure 4. I
OUT
vs. V
OUT
TIME = 100ms/DIV
BROADBAND NOISE – 200mV/DIV
Figure 7. Broadband Noise
3.5
3.0
0
01 534
1.5
2.5
2.0
2
LOGIC VOLTAGE – Volts
SUPPLY CURRENT – mA
V
DD
= +5V
V
DD
= +3V
T
A
= +258C
DATA = FFF
H
1.0
0.5
Figure 10. Supply Current vs. Logic
Input Voltage
HORIZONTAL = 1ms/DIV
Figure 6. Detail Settling Time
HORIZONTAL = 20ms/DIV
Figure 9. Large Signal Settling Time
0.5ms/DIV
Figure 12. Digital Feedthrough vs.
Time
Typical Performance Characteristics–