Datasheet

AD823

Rev. A | Page 14 of 20

OUTPUT IMPEDANCE

The low frequency open-loop output impedance of the com-

mon-emitter output stage used in this design is approximately

30 kΩ. While this is significantly higher than a typical emitter

follower output stage, when it is connected with feedback, the

output impedance is reduced by the open-loop gain of the op

amp. With 109 dB of open-loop gain, the output impedance is

reduced to <0.2 Ω. At higher frequencies, the output impedance

will rise as the open-loop gain of the op amp drops; however,

the output also becomes capacitive due to the integrator capaci-

tors C1 and C2. This prevents the output impedance from ever

becoming excessively high (see Figure 18), which can cause

stability problems when driving capacitive loads. In fact, the

AD823 has excellent cap-load drive capability for a high

frequency op amp. Figure 34 shows the AD823 connected as a

follower while driving 470 pF direct capacitive load. Under

these conditions, the phase margin is approximately 20°. If

greater phase margin is desired, a small resistor can be used

in series with the output to decouple the effect of the load ca-

pacitance from the op amp (see Figure 26). In addition, running

the part at higher gains will also improve the capacitive load

drive capability of the op amp.

OUT

S1N

S1P

C5R1

00901-A-037

Figure 37. Small Signal Schematic