Datasheet

AD822
REV. A
–9–
50
0
10 100 10M1M100k10k1k
60
70
80
90
10
20
30
40
FREQUENCY – Hz
COMMON-MODE REJECTION – dB
V
S
= ±15V
V
S
= 0V, 5V
V
S
= 0V, 3V
Figure 16. Common-Mode Rejection vs. Frequency
–55°C
COMMON-MODE VOLTAGE FROM SUPPLY RAILS – Volts
COMMON-MODE ERROR VOLTAGE – mV
5
0
3
3
1
2
–1
4
210
NEGATIVE
RAIL
POSITIVE
RAIL
–55°C
+125°C
+25°C
+125°C
Figure 17. Absolute Common-Mode Error vs. Common-
Mode Voltage from Supply Rails (V
S
– V
CM
)
1000
100
0
0.001 0.01 1001010.1
10
LOAD CURRENT – mA
OUTPUT SATURATION VOLTAGE – mV
V
S
– V
OH
V
OL
– V
S
Figure 18. Output Saturation Voltage vs. Load Current
100
40
–20
10 100 10M1M100k10k1k
60
80
0
20
FREQUENCY – Hz
OPEN-LOOP GAIN – dB
R
L
= 2kΩ
C
L
= 100pF
100
40
–20
60
80
0
20
PHASE MARGIN IN DEGREES
GAIN
PHASE
Figure 13. Open-Loop Gain and Phase Margin vs.
Frequency
1k
100
0.01
100 1k 10M1M100k10k
10
1
0.1
FREQUENCY – Hz
OUTPUT IMPEDANCE – Ω
A
CL
= +1
V
S
= ±15V
Figure 14. Output Impedance vs. Frequency
+16
–16
5.0
–8
–12
1.00.0
0
–4
+4
+8
+12
4.03.02.0
SETTLING TIME – µs
OUTPUT SWING FROM 0 TO ±Volts
1%
1%
0.01%0.1%
ERROR
Figure 15. Output Swing and Error vs. Settling Time