Datasheet

AD8222
Rev. A | Page 14 of 24
15
10
5
0
0 5 10 15 20
SETTLING TIME (µs)
OUTPUT VOLTAGE STEP SIZE (V)
05947-040
SETTLED TO 0.01%
SETTLED TO 0.001%
Figure 39. Settling Time vs. Step Size (G = 1)
1 10 100
SETTLED TO 0.01%
SETTLED TO 0.001%
1k
GAIN
05947-041
1k
10
100
1
SETTLING TIME (µs)
Figure 40. Settling Time vs. Gain for a 10 V Step
200
180
160
140
120
100
80
60
11M100k10k1k10010
FREQUENCY (Hz)
05947-042
CHANNEL SEPARATION (dB)
GAIN = 1
GAIN = 1000
SOURCE V
OUT
SMALLER TO
AVOID SLEW
RATE LIMIT
SOURCE
V
OUT
= 20V p-p
THERMAL CROSSTALK
VARIES WITH LOAD
Figure 41. Channel Separation vs. Frequency, R
L
= 2 kΩ, Source Channel at G = 1
100 10k1k 100k 1M 10M
FREQUENCY (Hz)
05947-043
60
–40
–20
0
20
40
GAIN (dB)
GAIN = 1000
GAIN = 100
GAIN = 10
GAIN = 1
Figure 42. Differential Output Configuration: Gain vs. Frequency
1 10k1k10010 100k 1M
FREQUENCY (Hz)
05947-056
100
90
80
70
60
50
40
30
20
10
0
OUTPUT BALANCE (dB)
LIMITED BY
MEASUREMENT
SYSTEM
OUTPUT BALANCE = 20 log
V
DIFF_OUT
V
CM_OUT
Figure 43. Differential Output Configuration:
Output Balance vs. Frequency