Datasheet
AD8197B
Rev. 0 | Page 19 of 28
HIGH SPEED DEVICE MODES REGISTER
HS_EN: High Speed (TMDS) Channels Enable Bit
Table 6. HS_EN Description
HS_EN Description
0 High speed channels off, low power/standby mode
1 High speed channels on
HS_CH[1:0]: High Speed (TMDS) Switch Source Select Bus
Table 7. HS_CH Mapping
HS_CH[1:0] O[3:0] Description
00 A[3:0] High Speed Source A switched to output
01 B[3:0] High Speed Source B switched to output
10 C[3:0] High Speed Source C switched to output
11 D[3:0] High Speed Source D switched to output
AUXILIARY DEVICE MODES REGISTER
AUX_EN: Auxiliary (Low Speed) Switch Enable Bit
Table 8. AUX_EN Description
AUX_EN Description
0 Auxiliary switch off
1 Auxiliary switch on
AUX_CH[1:0]: Auxiliary (Low Speed) Switch Source
Select Bus
Table 9. AUX_CH Mapping
AUX_CH[3:0] AUX_COM[3:0] Description
00 AUX_A[3:0]
Auxiliary Source A switched
to output
01 AUX_B[3:0]
Auxiliary Source B switched
to output
10 AUX_C[3:0]
Auxiliary Source C switched
to output
11 AUX_D[3:0]
Auxiliary Source D switched
to output
RECEIVER SETTINGS REGISTER
RX_TS: High Speed (TMDS) Channels Input Termination
On/Off Select Bit
Table 10. RX_TS Description
RX_TS Description
0 All input terminations off (switches open)
1
Input termination resistor switch is controlled by
RX_TO[x] control bits from Input Term. Resistor
Control Registers 1 and 2.
INPUT TERMINATION SELECT REGISTER 1 AND
REGISTER 2
RX_TO[X]: High Speed (TMDS) Input Channel X
Termination Select Bit
Table 11. RX_TO[X] Description
RX_TO[X] Description
0 Input termination for TMDS Channel X disconnected
1 Input termination for TMDS Channel X connected
Table 12. RX_TO[X] Mapping
RX_TO[X] Corresponding Input TMDS Channel
Bit 0 B0
Bit 1 B1
Bit 2 B2
Bit 3 B3
Bit 4 A0
Bit 5 A1
Bit 6 A2
Bit 7 A3
Bit 8 C3
Bit 9 C2
Bit 10 C1
Bit 11 C0
Bit 12 D3
Bit 13 D2
Bit 14 D1
Bit 15 D0
RECEIVE EQUALIZER REGISTER 1 AND REGISTER 2
RX_EQ[X]: High Speed (TMDS) Input X Equalization Level
Select Bit
Table 13. RX_EQ[X] Description
RX_EQ[X] Description
0 Low equalization (6 dB)
1 High equalization (12 dB)
Table 14. RX_EQ[X] Mapping
RX_EQ[X] Corresponding Input TMDS Channel
Bit 0 B0
Bit 1 B1
Bit 2 B2
Bit 3 B3
Bit 4 A0
Bit 5 A1
Bit 6 A2
Bit 7 A3
Bit 8 C3
Bit 9 C2
Bit 10 C1
Bit 11 C0
Bit 12 D3
Bit 13 D2
Bit 14 D1
Bit 15 D0