Datasheet

AD8197B
Rev. 0 | Page 18 of 28
SERIAL INTERFACE CONFIGURATION REGISTERS
The serial interface configuration registers can be read and written using the I
2
C serial control interface, Pin I2C_SDA, and Pin I2C_SCL.
The least significant bits of the AD8197B I
2
C part address are set by tying the Pin I2C_ADDR2, Pin I2C_ADDR1, and Pin I2C_ADDR0
to 3.3 V (Logic 1) or 0 V (Logic 0). As soon as the serial control interface is used, the parallel control interface is disabled until the
AD8197B is reset as described in the
Serial Control Interface section.
Table 5. Serial (I
2
C) Interface Register Map
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Addr. Default
High
speed
switch
enable
High speed source select
High
Speed
Device
Modes
HS_EN 0 0 0 0 HS_CH[1] HS_CH[0]
0x00 0x40
Auxiliary
switch
enable
Auxiliary switch source
select
Auxiliary
Device
Modes
AUX_EN 0 0 0 0 AUX_CH[1] AUX_CH[0]
0x01 0x40
High speed
input
termination
resistor
select
Receiver
Settings
RX_TS
0x10 0x01
Source A and Source B: input termination select
Input
Term.
Resistor
Control 1
RX_TO[7] RX_TO[6] RX_TO[5] RX_TO[4] RX_TO[3] RX_TO[2] RX_TO[1] RX_TO[0]
0x11 0x00
Source C and Source D: input termination select 0x12 0x00
Input
Term.
Resistor
Control 2
RX_TO[15] RX_TO[14] RX_TO[13] RX_TO[12] RX_TO[11] RX_TO[10] RX_TO[9] RX_TO[8]
Source A and Source B: input equalization level select 0x13 0x00
Receive
Equalizer 1
RX_EQ[7] RX_EQ[6] RX_EQ[5] RX_EQ[4] RX_EQ[3] RX_EQ[2] RX_EQ[1] RX_EQ[0]
Source C and Source D: input equalization level select
Receive
Equalizer 2
RX_EQ[15] RX_EQ[14] RX_EQ[13] RX_EQ[12] RX_EQ[11] RX_EQ[10] RX_EQ[9] RX_EQ[8]
0x14 0x00
High speed output
pre-emphasis level
select
High speed
output
termination
select
High speed
output
current
level select
Transmitter
Settings
TX_PE[1] TX_PE[0] TX_PTO TX_OCL
0x20 0x03