Datasheet

AD8194
Rev. 0 | Page 15 of 16
Figure 26 shows the layout of the TMDS traces. These are 100 Ω
differential, controlled-impedance traces. Serpentine traces are
used for some of the paths to match the lengths within a group
of four. The gray traces are routed on the top layer and the black
traces on the bottom layer.
The low speed switching is performed by an MC74LVX4053.
This part contributes a maximum on resistance of 108  and a
maximum capacitive load of 10 pF. The same select signal
(S_SEL) controls both the AD8194 and the MC74LVX4053.
07004-015
Figure 26. Layout of TMDS Traces