Datasheet

AD8192
Rev. 0 | Page 17 of 28
CONFIGURATION REGISTERS
The serial interface configuration registers can be read and written using the I
2
C serial interface, Pin I2C_SDA, and Pin I2C_SCL. The
least significant bit of the AD8192 I
2
C part address is set by tying the Pin I2C_ADDR to 3.3 V (I2C_ADDR = 1b) or 0 V (I2C_ADDR = 0b).
Table 9. Register Map
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Addr. Default
High
Speed
Device
Modes
High speed
switch
enable
High speed
source select
0x00 0x40
HS_EN HS_CH
Auxiliary
Device
Modes
Auxiliary
switch mode
lock
Auxiliary
switch
enable
Auxiliary
switch
source select
0x01 0xC0
AUX_LK AUX_EN AUX_CH
Receiver
Settings
Input
termination
control mode
select
0x10 0x01
RX_TO
Input
Termina-
tion
Control
Input termination select 0x11 0x00
RX_PT[7] RX_PT[6] RX_PT[5] RX_PT[4] RX_PT[3] RX_PT[2] RX_PT[1] RX_PT[0]
Receive
Equalizer
Input equalization level select 0x14 0xFF
RX_EQ[7] RX_EQ[6] RX_EQ[5] RX_EQ[4] RX_EQ[3] RX_EQ[2] RX_EQ[1] RX_EQ[0]
Transmitter
Settings
Output pre-emphasis
level select
Output
termination
on/off select
Output
current level
select
0x20 0x03
TX_PE[1] TX_PE[0] TX_PTO TX_OCL
Source
Sign
Control
Source B input sign select Source A input sign select 0x80 0x00
B_SG[3] B_SG[2] B_SG[1] B_SG[0] A_SG[3] A_SG[2] A_SG[1] A_SG[0]
Source A
Input/
Output
Mapping
Sourch A high speed input/output mapping 0x81 0xE4
A3_HS_MAP[1] A3_HS_MAP[0] A2_HS_MAP[1] A2_HS_MAP[0] A1_HS_MAP[1] A1_HS_MAP[0] A0_HS_MAP[1] A0_HS_MAP[0]
Source B
Input/
Output
Mapping
Source B high speed input/output mapping 0x82 0xE4
B3_HS_MAP[1] B3_HS_MAP[0] B2_HS_MAP[1] B2_HS_MAP[0] B1_HS_MAP[1] B1_HS_MAP[0] B0_HS_MAP[1] B0_HS_MAP[0]