Datasheet
REV. –12–
AD818
AD818 SETTLING TIME
Settling time primarily comprises two regions. The first is the slew
time in which the amplifier is overdriven, where the output voltage
rate of change is at its maximum. The second is the linear time
period required for the amplifier to settle to within a specified
percentage of the final value.
Measuring the rapid settling time of the AD818 (45 ns to 0.1%
and 80 ns to 0.01%—10 V step) requires applying an input pulse
with a very fast edge and an extremely flat top. With the AD818
configured in a gain of –1, a clamped false summing junction
responds when the output error is within the sum of two diode
voltages (approximately 1 V). The signal is then amplified 20 times
by a clamped amplifier whose output is connected directly to a
sampling oscilloscope.
AD829
100⍀
0.47F
0.01F
–V
S
0.47F
0.01F
+V
S
SHORT, DIRECT CONNECTION
TO TEKTRONIX TYPE 11402
OSCILLOSCOPE PREAMP
INPUT SECTION
15pF
1M⍀
2ⴛ
HP2835
ERROR AMPLIFIER
V
ERROR
OUTPUT ⴛ 10
1.9k⍀
100⍀
AD818
0.01F
–V
S
0.01F
2.2F
+V
S
2.2F
10pF
SCOPE PROBE
CAPACITANCE
TEKTRONIX P6201
FET PROBE TO
TEKTRONIX TYPE 11402
OSCILLOSCOPE
PREAMP INPUT SECTION
500⍀
5pF–18pF
DEVICE
UNDER
TEST
NOTE
USE CIRCUIT BOARD
WITH GROUND PLANE
FALSE
SUMMING
NODE
NULL
ADJUST
1k⍀
100⍀
1k⍀
50⍀
COAX
CABLE
TTL LEVEL
SIGNAL
GENERATOR
50Hz
OUTPUT
1, 14
7, 8
DIGITAL
GROUND
ANALOG
GROUND
0 TO ⴞ10V
POWER
SUPPLY
EI&S
DL1A05GM
MERCURY
RELAY
ERROR
SIGNAL
OUTPUT
500⍀
50⍀
2ⴛ
HP2835
Figure 7. Settling Time Test Circuit
A High Performance Video Line Driver
The buffer circuit shown in Figure 8 will drive a back-terminated
75 W video line to standard video levels (1 V p-p) with 0.1 dB
gain flatness to 55 MHz with only 0.05∞ and 0.01% differential
phase and gain at the 3.58 MHz NTSC subcarrier frequency.
This level of performance, which meets the requirements for
high definition video displays and test equipment, is achieved
using only 7 mA quiescent current.
1k⍀
1k⍀
R
T
75⍀
75⍀
+15V
R
BT
75⍀
V
IN
R
T
75⍀
–15V
2.2F
0.01F
AD818
0.01F
2.2F
Figure 8. Video Line Driver
D