Datasheet

AD8158
Rev. B | Page 12 of 36
50 CABLES
2 2
TP3
HIGH
SPEED
SAMPLING
OSCILLOSCOPE
50 CABLES
2 2
50
AD8158
AC-COUPLED
EVALUATION
BOARD
INPUT
PIN
OUTPUT
PIN
PATTERN
GENERATOR
DATA OUT
TP1
50 CABLES
2 2
TP2
FR4 TEST BACKPLANE
DIFFERENTIAL
STRIPLINE TRACES
8mils WIDE, 8mils SPACE,
8mils DIELECTRIC HEIGHT
TRACE LENGTHS = 20 INCHES,
30 INCHES
25ps/DIV
200mV/DI
V
REFERENCE EYE DIAGRAM AT TP1
06646-012
Figure 12. Output Pre-emphasis Test Circuit
25ps/DIV
200mV/DI
V
06646-013
Figure 13. 6.5 Gbps Output Eye, 20 Inch FR4 Input Channel, PE = 0
(TP3 from Figure 12)
25ps/DIV
200mV/DI
V
06646-014
Figure 14. 6.5 Gbps Output Eye, 30 Inch FR4 Input Channel, PE = 0
(TP3 from Figure 12)
25ps/DIV
200mV/DI
V
06646-015
Figure 15. 6.5 Gbps Output Eye, 20 Inch FR4 Input Channel, PE = Best Setting,
Default Output Level (TP3 from Figure 12)
25ps/DIV
100mV/DI
V
06646-016
Figure 16. 6.5 Gbps Output Eye, 30 Inch FR4 Input Channel, PE = Best Setting,
200 mV Output Level (TP3 from Figure 12)