Datasheet

AD8150
Rev. A | Page 24 of 44
01074-034
V
CC
V
EE
V
CC
– 2V
I
OUT
V
EE
DISABLE
OUTyyP OUTyyN
Figure 34. Simplified Output Circuit
To ensure proper operation, all outputs (including unused
output) must be pulled high, using external pull-up networks,
to a level within the output compliance range. If outputs from
multiple AD8150s are wired together, a single pull-up network
may be used for each output bus. The pull-up network should
be chosen to keep the output voltage levels within the output
compliance range at all times. Recommended pull-up networks
to produce PECL/ECL 100K- and 10K-compatible outputs are
shown in
Figure 35. Alternatively, a separate supply can be used
to provide V
COM
, making R
COM
and D
COM
unnecessary.
01074-035
OUTyyN
OUTyyP
AD8150
OUTyyN
OUTyyP
AD8150
V
CC
R
L
R
L
R
L
V
CC
R
L
V
COM
R
COM
V
COM
D
COM
Figure 35. Output Pull-Up Networks: a) ECL 100K, b) ECL 10K
The output levels are simply:
()
()
()
ModeDVVV
ModeRIVV
RIVVV
RIVV
VV
COMCCCOM
COM
OUT
CCCOM
L
OUT
OLOHSWING
L
OUT
COMOL
COMOH
K10
K100
−=
−=
=−=
−=
=
The common-mode adjustment element (R
COM
or D
COM
) may be
omitted if the input range of the receiver includes the positive
supply voltage. The bypass capacitors reduce common-mode
perturbations by providing an ac short from the common nodes
(V
COM
) to ground.
When busing together the outputs of multiple AD8150s or
when running at high data rates, double termination of its
outputs is recommended to mitigate the impact of reflections
due to open transmission line stubs and the lumped capacitance
of the AD8150 output pins. A possible connection is shown in
Figure 36; the bypass capacitors provide an ac short from the
common nodes of the termination resistors to ground. To
maintain signal fidelity at high data rates, the stubs connecting
the output pins to the output transmission lines or load resistors
should be as short as possible.
01074-036
R
L
R
L
R
L
R
L
Z
O
Z
O
Z
O
Z
O
V
CC
R
COM
V
COM
OUTyyN
OUTyyP
AD8150
OUTyyN
OUTyyP
AD8150
RECEIVER
Figure 36. Double Termination of AD8150 Outputs
In this case, the output levels are:
(
)
()
()
L
OUT
OLOHSWING
L
OUT
COMOL
L
OUT
COMOH
RIVVV
RIVV
RIVV
21
43
41
=−=
−=
−
=
OUTPUT CURRENT SET PIN (REF)
A simplified schematic of the reference circuit is shown in
Figure 37. A single external resistor connected between the
REF pin and V
EE
determines the output current for all output
stages. This feature allows a choice of pull-up networks and
transmission line characteristic impedances while still achieving
a nominal output swing of 800 mV. At low data rates, substantial
power savings can be achieved by using lower output swings
and higher load resistances.
01074-037
R
SET
V
EE
V
CC
I
OUT
/25
AD8150
REF
1.25V
Figure 37. Simplified Reference Circuit