Datasheet

AD8138
Rev. F | Page 21 of 24
HIGH PERFORMANCE ADC DRIVING
The circuit in Figure 46 shows a simplified front-end
connection for an AD8138 driving an
AD9224, a 12-bit,
40 MSPS ADC. The ADC works best when driven differentially,
which minimizes its distortion. The AD8138 eliminates the
need for a transformer to drive the ADC and performs single-
ended-to-differential conversion, common-mode level-shifting,
and buffering of the driving signal.
The positive and negative outputs of the AD8138 are connected
to the respective differential inputs of the
AD9224 via a pair of
49.9 Ω resistors to minimize the effects of the switched-capacitor
front end of the
AD9224. For best distortion performance, it
runs from supplies of ±5 V.
The AD8138 is configured with unity gain for a single-ended,
input-to-differential output. The additional 23 Ω, 523 Ω total, at
the input to −IN is to balance the parallel impedance of the
50 Ω source and its 50 Ω termination that drives the
noninverting input.
The signal generator has a ground-referenced, bipolar output,
that is, it drives symmetrically above and below ground.
Connecting V
OCM
to the CML pin of the AD9224 sets the output
common-mode of the AD8138 at 2.5 V, which is the midsupply
level for the
AD9224. This voltage is bypassed by a 0.1 μF
capacitor.
The full-scale analog input range of the
AD9224 is set to
4 V p-p, by shorting the SENSE terminal to AVSS. This has
been determined to be the scaling to provide minimum
harmonic distortion.
For the AD8138 to swing at 4 V p-p, each output swings 2 V p-p
while providing signals that are 180° out of phase. With a
common-mode voltage at the output of 2.5 V, each AD8138
output swings between 1.5 V and 3.5 V.
A ground-referenced 4 V p-p, 5 MHz signal at D
IN
+ was used to
test the circuit in
Figure 46. When the combined-device circuit
was run with a sampling rate of 20 MSPS, the spurious-free
dynamic range (SFDR) was measured at −85 dBc.
49.9Ω
0.1pF
523Ω
499Ω
49.9Ω
499Ω
499Ω
VINB
+5V
DRVDDAVDD
VINA
+5
V
AD9224
V
OCM
AD8138
–5V
SENSE
+
DIGITAL
OUTPUTS
0.1pF0.1pF
DRVSSCMLAVSS
49.9Ω
50Ω
SOURCE
8
2
1
6
3
5
4
24
23
15 26
16 25
28
17 22 27
01073-045
Figure 46. AD8138 Driving an AD9224, a 12-Bit, 40 MSPS ADC