Datasheet

AD8134
Rev. A | Page 6 of 20
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
AD8134
OPD 1
V
S–
2
–IN R 3
+IN R 4
V
S–
5
SYNC LEVEL
V
S+
(SYNC)
–IN B
+IN B
V
S–
18
17
16
15
14
–
OUT R 6 –OUT B 13
V
S+
–IN G +IN G V
S–
(SYNC)
V
SYNC
24 23 22 21 20
H
SYNC
19
+OUT R
V
S+
+OUT G
–OUT G
V
S+
7 8 9 10 11
+OUT B
12
×2
R
G
B
04770-001
Figure 4. 24-Lead LFCSP
Table 5. Pin Function Descriptions
Pin No. Mnemonic Description
1 OPD Output Pull Down.
2, 5, 14, 21 V
S−
Negative Power Supply Voltage.
3 −IN R Inverting Input, Red Amplifier.
4 +IN R Noninverting Input, Red Amplifier.
6 −OUT R Negative Output, Red Amplifier.
7 +OUT R Positive Output, Red Amplifier.
8, 11, 17, 24 V
S+
Positive Power Supply Voltage.
9 +OUT G Positive Output, Green Amplifier.
10 −OUT G Negative Output, Green Amplifier.
12 +OUT B Positive Output, Blue Amplifier.
13 −OUT B Negative Output, Blue Amplifier.
15 +IN B Noninverting Input, Blue Amplifier.
16 −IN B Inverting Input, Blue Amplifier.
18 SYNC LEVEL
The voltage applied to this pin controls the amplitude of the sync pulses that are applied to
the common-mode voltages.
19 H
SYNC
Horizontal Sync Pulse Input.
20 V
SYNC
Vertical Sync Pulse Input.
22 +IN G Noninverting Input, Green Amplifier.
23 −IN G Inverting Input, Green Amplifier.
AD8134
+
–
53.6Ω
53.6Ω
R
L, dm
200Ω V
OUT, dm
+
–
0.1μF ON ALL
V
S–
PINS
1.5kΩ
V
TEST
TEST
SIGNAL
SOURCE
50Ω
–5V
50Ω
750Ω
750Ω
MIDSUPPLY
0.1μF ON ALL
V
S+
PINS
1.5kΩ
+5V
V
S+
V
S–
04770-034
Figure 5. Basic Test Circuit