Datasheet

AD8117/AD8118
Rev. A | Page 15 of 36
I/O SCHEMATICS
OPn, ONn
06365-008
Figure 8. AD8117/AD8118 Enabled Output
(see also ESD Protection Map,
Figure 18)
0.4pF 30k
3.4pF
3.4pF
OPn
ONn
06365-009
Figure 9. AD8117/AD8118 Disabled Output
(see also ESD Protection Map,
Figure 18)
1.3pF
1.3pF
0.3pF
IPn
INn
2500
2500
2538
2538
06365-010
Figure 10. AD8117 Receiver (see also ESD Protection Map,
Figure 18)
2500
5075
0.3pF
1.3pF
1.3pF
2500 5075
IPn
INn
06365-068
Figure 11. AD8118 Receiver (see also ESD Protection Map,
Figure 18)
1.3pF
1.3pF
0.3pF
IP
n
INn
2500
2500
0
6365-011
Figure 12. AD8117/AD8118 Receiver Simplified Equivalent Circuit When
Driving Differentially
1.6pF
IP
n
INn
3.33k AD8117 G = +1
3.76k AD8118 G = +2
0
6365-012
Figure 13. AD8117/AD8118 Receiver Simplified Equivalent Circuit When
Driving Single-Ended
V
OCM
VNEG
0
6365-013
Figure 14. VOCM Input (see also ESD Protection Map,
Figure 18)
RESET
DGND
DD
1k
25k
0
6365-014
Figure 15. Reset Input (see also ESD Protection Map,
Figure 18)