Datasheet

AD8117/AD8118
Rev. A | Page 35 of 36
If multiple AD8117/AD8118s are to be driven in parallel, a fly-
by input termination scheme is very useful, but the distance
from each AD8117/AD8118 input to the driven input
transmission line is a stub that should be minimized in length
and parasitics using the discussed guidelines.
When driving the AD8117/AD8118 single-endedly, the
undriven input is often terminated with a resistance in order to
balance the input stage. It can be seen that by terminating the
undriven input with a resistor of one half the characteristic
impedance, the input stage is perfectly balanced (37.5 , for
example, to balance the two parallel 75  terminations on the
driven input). However, due to the feedback in the input
receiver, there is high speed signal current leaving the undriven
input. In order to terminate this high speed signal, proper
transmission line techniques should be used. One solution is to
adjust the trace width to create a transmission line of half the
characteristic impedance and terminate the far end with this
resistance (37.5  in a 75  system). This is not often practical
as trace widths become large. In most cases, the best practical
solution is to place the half-characteristic impedance resistor as
close as possible (preferably less than 1.5 cm away) and to
reduce the parasitics of the stub (by removing the ground plane
under the stub, for example). In either case, the designer must
decide if the layout complexity created by a balanced,
terminated solution is preferable to simply grounding the
undriven input at the ball with no trace.
Although the examples discussed so far are for input
termination, the theory is similar for output back-termination.
Taking the AD8117/AD8118 as an ideal voltage source, any
distance of routing between the AD8117/AD8118 and a back-
termination resistor will be an impedance mismatch that
potentially creates reflections. For this reason, back-termination
resistors should also be placed close to the AD8117/AD8118. In
practice, because back-termination resistors are series elements,
they can be placed close to the AD8117/AD8118 outputs.
GND
VOCM
VDD
AD8117/
AD8118
ON[31:0], OP[31:0]IN[31:0], IP[31:0]
CLK
RESET
WE
UPDATE
DATA IN
DATA OUT
J3
PLD_VDD
PC_VDD
PC_GND
SMA
SMA
V
POS
VNEG
DGND
VDD
VPOS
VNEG
CPLD
50Ω
50Ω
LOGIC
PC
PARALLEL
PORT
IN[31:0],
IP[31:0]
LOGIC
ISOLATORS
J8,
W3 TO W7
ON[31:0],
OP[31:0]
ANALOG
06365-067
Figure 73. Evaluation Board Simplified Schematic