Datasheet

AD8104/AD8105
Rev. 0 | Page 30 of 36
Single-Ended Gain
The AD8104/AD8105 operate as a closed-loop differential
amplifier. The primary control loop forces the difference
between the output terminals to be a ratio of the difference
between the input terminals. One output increases in voltage,
while the other decreases an equal amount to make the total
difference correct. The average of these output voltages is forced
to be equal to the voltage on the VOCM terminal by a second
control loop. If only one output terminal is observed with
respect to the VOCM terminal, only half of the difference
voltage is observed. This implies that when using only one
output of the device, half of the differential gain is observed. An
AD8104 taken with single-ended output appears to have a gain
of +0.5. An AD8105 has a single-ended gain of +1.
This factor of one half in the gain increases the noise of the
device when referred to the input, contributing to higher noise
specifications for single-ended output designs.
Te rm i na ti on
When operating the AD8104/AD8105 with a single-ended
output, the preferred output termination scheme is a resistor at
the load end to the VOCM voltage. A back-termination can be
used, at an additional cost of one half the signal gain.
In single-ended output operation, the complementary phase of
the output is not used, and may or may not be terminated
locally. Although the unused output can be floated to reduce
power dissipation, there are several reasons for terminating the
unused output with a load resistance matched to the load on the
signal output.
One component of crosstalk is magnetic, coupling by mutual
inductance between output package traces and bond wires that
carry load current. In a differential design, there is coupling
from one pair of outputs to other adjacent pairs of outputs. The
differential nature of the output signal simultaneously drives the
coupling field in one direction for one phase of the output, and
in an opposite direction for the other phase of the output. These
magnetic fields do not couple exactly equal into adjacent output
pairs due to different proximities, but they do destructively
cancel the crosstalk to some extent. If the load current in each
output is equal, this cancellation is greater, and less adjacent
crosstalk is observed (regardless if the second output is actually
being used).
A second benefit of balancing the output loads in a differential
pair is to reduce fluctuations in current requirements from the
power supply. In single-ended loads, the load currents alternate
from the positive supply to the negative supply. This creates a
parasitic signal voltage in the supply pins due to the finite
resistance and inductance of the supplies. This supply fluctuation
appears as crosstalk in all outputs, attenuated by the power
supply rejection ratio (PSRR) of the device. At low frequencies,
this is a negligible component of crosstalk, but PSRR falls off as
frequency increases. With differential, balanced loads, as one
output draws current from the positive supply, the other output
draws current from the negative supply. When the phase
alternates, the first output draws current from the negative
supply and the second from the positive supply. The effect is
that a more constant current is drawn from each supply, such
that the crosstalk-inducing supply fluctuation is minimized.
A third benefit of driving balanced loads can be seen if one
considers that the output pulse response changes as load
changes. The differential signal control loop in the AD8104/
AD8105 forces the difference of the outputs to be a fixed ratio
to the difference of the inputs. If the two output responses are
different due to loading, this creates a difference that the control
loop sees as signal response error, and it attempts to correct this
error. This distorts the output signal from the ideal response if
the two outputs were balanced.
OPn
ONn
75Ω
75Ω
150Ω
AD8104/
AD8105
06612-069
Figure 69. Example of Back-Terminated Single-Ended Load
Decoupling
The signal path of the AD8104/AD8105 is based on high open-
loop gain amplifiers with negative feedback. Dominant-pole
compensation is used on-chip to stabilize these amplifiers over
the range of expected applied swing and load conditions. To
guarantee this designed stability, proper supply decoupling is
necessary with respect to both the differential control loops and
the common-mode control loops of the signal path. Signal-
generated currents must return to their sources through low
impedance paths at all frequencies in which there is still loop
gain (up to 700 MHz at a minimum). A wideband parallel
capacitor arrangement is necessary to properly decouple the
AD8104/AD8105.
The signal path compensation capacitors in the AD8104/
AD8105 are connected to the VNEG supply. At high frequencies,
this limits the power supply rejection ratio (PSRR) from the
VNEG supply to a lower value than that from the VPOS supply.
If given a choice, an application board should be designed such
that the VNEG power is supplied from a low inductance plane,
subject to a least amount of noise.
The VOCM should be considered a reference pin and not a
power supply. It is an input to the high speed, high gain
common-mode control loop of all receivers and output drivers.
In the single-ended output sense, there is no rejection from
noise on the VOCM net to the output. For this reason, care
must be taken to produce a low noise VOCM source over the
entire range of frequencies of interest. This is not only
important to single-ended operation, but to differential