Datasheet

AD8104/AD8105
Rev. 0 | Page 6 of 36
TIMING CHARACTERISTICS (PARALLEL MODE)
Specifications subject to change without notice.
Table 4.
Limit
Parameter Symbol Min Typ Max Unit
Parallel Data Setup Time t
1
80 ns
WE Pulse Width
t
2
110 ns
Parallel Data Hold Time t
3
150 ns
WE Pulse Separation
t
4
90 ns
WE to UPDATE Delay
t
5
10 ns
UPDATE Pulse Width
t
6
90 ns
Propagation Delay, UPDATE to Switch On or Off
100 ns
RESET Pulse Width
60 ns
RESET Time
200 ns
t
2
t
4
1
0
WE
1
0
t
1
t
3
1 = LATCHED
0 = TRANSPARENT
UPDATE
t
6
D0 TO D5
A0 TO A3
t
5
06612-003
Figure 3. Timing Diagram, Parallel Mode
Table 5. Logic Levels
V
IH
V
IL
V
OH
V
OL
I
IH
I
IL
I
OH
I
OL
RESET, SER/PAR,
WE, D0, D1, D2,
D3, D4, D5, A0,
A1, A2, A3,
UPDATE
RESET, SER/PAR,
WE, D0, D1, D2,
D3, D4, D5, A0,
A1, A2, A3,
UPDATE
DATA OUT DATA OUT
RESET
1
, SER/PAR, WE,
D0, D1, D2, D3, D4,
D5, A0, A1, A2, A3,
UPDATE
RESET
1
, SER/PAR,
WE, D0, D1, D2,
D3, D4, D5, A0, A1,
A2, A3,
UPDATE
DATA OUT DATA OUT
2.0 V min 0.6 V max Disabled Disabled 1 µA max –1 µA min Disabled Disabled
1
See Figure 15.