Datasheet

AD8067 Data Sheet
Rev. B | Page 12 of 24
TEST CIRCUITS
5
2
3
1
4
AD8067
110
1k
–V
EE
+V
CC
10µF
0.1µF
49.9
10µF
0.1µF
V
OUT
V
IN
+
+
A
V
= 10
R
L
= 1k
Figure 34. Standard Test Circuit
5
2
3
1
4
AD8067
110
100
1k
–V
EE
V
OUT
+V
CC
10µF
0.1µF
10µF
0.1µF
1k
V–
+
+
A
OL
=
V
OUT
V–
Figure 35. Open-Loop Gain Test Circuit
5
2
3
1
4
AD8067
110
1k
–V
EE
+V
CC
10µF
0.1µF
49.9
1k
10µF
0.1µF
C
LOAD
V
OUT
V
IN
R
SNUB
+
+
A
V
= 10
Figure 36. Test Circuit for Capacitive Load
5
2
3
1
4
AD8067
110
1k
V
OUT
–V
EE
+V
CC
10µF
0.1µF
10µF
0.1µF
1k
1k
+
+
110
V
IN
Figure 37. CMRR Test Circuit
5
2
3
1
4
AD8067
110
1k
V
OUT
–V
EE
+V
CC
V
IN
10µF
0.1µF
100
1k
+
Figure 38. Positive PSRR Test Circuit
5
2
3
1
4
AD8067
110
–V
EE
+V
CC
10µF
0.1µF
10µF
0.1µF
NETWORK ANALYZER
1k
+
+
100
V
OUT
Figure 39. Output Impedance Test Circuit