Datasheet

AD8065/AD8066
Rev. J | Page 14 of 28
02916-E-028
t = 0
64 μ s/DIV
2mV/DIV
+0.1%
–0.1%
V
IN
= 140mV/DIV
V
OUT
– 2V
IN
Figure 28. Long-Term Settling Time (See Figure 49)
–30
–25
–20
–15
–10
–5
0
INPUT BIAS CURRENT (pA)
45 5525 35 65 75 85
TEMPERATURE (°C)
02916-E-029
–I
b
+I
b
Figure 29. Input Bias Current vs. Temperature
–0.3
–0.2
–0.1
0
0.1
0.2
0.3
OFFSET VOLTAGE (mV)
–14 –10–12 –8–6–4 0 8–2 2 4 6 10 12 14
COMMON-MODE VOLTAGE (V)
02916-E-030
V
S
= ±12V
V
S
= ±5V
V
S
= +5V
Figure 30. Input Offset Voltage vs. Common-Mode Voltage
02916-E-031
+0.1%
2mV/DIV
10ns/DIV
–0.1%
t = 0
V
OUT
– 2V
IN
V
IN
= 500mV/DIV
Figure 31. 0.1% Short-Term Settling Time (See Figure 49)
02916-E-032
0
I
b
(μA)
36
30
24
18
12
6
–5
–15
–25
–30
0
I
b
(pA)
–12 8–2–10
0
–8 2–6 4–4
6
COMMON-MODE VOLTAGE (V)
10 12
42
–I
b
+I
b
–I
b
+I
b
FET INPUT STAGE BJT INPUT STAGE
–20
–10
5
10
Figure 32. Input Bias Current vs. Common-Mode Voltage Range
(See the Input and Output Overload Behavior Section)
02916-E-033
INPUT OFFSET VOLTAGE (mV)
35
15
0
–2.0 2.0–1.5 –1.0 –0.5 0 0.5 1.0 1.5
30
20
10
5
40
25
N = 299
SD = 0.388
MEAN = –0.069
Figure 33. Input Offset Voltage