Datasheet
AD8016  Data Sheet 
Rev. C | Page 14 of 20 
THEORY OF OPERATION 
The AD8016 is a current feedback amplifier with high  
(500 mA) output current capability. With a current feedback 
amplifier, the current into the inverting input is the feedback 
signal and the open-loop behavior is that of a transimpedance, 
dV
OUT
/dI
IN
 or T
Z
. The open-loop transimpedance is analogous  
to the open-loop voltage gain of a voltage feedback amplifier. 
Figure 42 shows a simplified model of a current feedback ampli-
fier. Because R
IN
 is proportional to 1/g
m
, the equivalent voltage 
gain is just T
Z
 × g
m
, where g
m
 is the transconductance of the 
input stage. Basic analysis of the follower with gain circuit yields 
FIN
Z
Z
IN
OUT
RRGST
S
T
G
V
V
+×+
×=
)(
)(
where: 
G
F
R
R
G += 1
Ω≈= 25
1
m
IN
g
R
Recognizing that G × R
IN
 << R
F
 for low gains, the familiar result 
of constant bandwidth with gain for current feedback amplifiers 
is evident, the 3 dB point being set when |T
Z
| = R
F
. Of course, 
for a real amplifier there are additional poles that contribute 
excess phase and there is a value for R
F
 below which the ampli-
fier is unstable. Tolerance for peaking and desired flatness 
determines the optimum R
F
 in each application. 
Figure 42. Simplified Block Diagram 
The AD8016 is the first current feedback amplifier capable of 
delivering 400 mA of output current while swinging to within 
2 V of either power supply rail. This enables full CO ADSL 
performance on only 12 V rails, an immediate 20% power 
saving. The AD8016 is also unique in that it has a power 
management system included on-chip. It features four user 
programmable power levels (all of which provide a low output 
impedance of the driver), as well as the provision for complete 
shutdown (high impedance state). Also featured is a thermal 
shutdown with alarm signal. 
POWER SUPPLY AND DECOUPLING 
The AD8016 should be powered with a good quality (that is, 
low noise) dual supply of ±12 V for the best distortion and 
multitone power ratio (MTPR) performance. Careful attention 
must be paid to decoupling the power supply pins. A 10 μF 
capacitor located in near proximity to the AD8016 is required 
to provide good decoupling for lower frequency signals. In 
addition, 0.1 μF decoupling capacitors should be located as 
close to each of the four power supply pins as is physically 
possible. All ground pins should be connected to a common 
low impedance ground plane. 
FEEDBACK RESISTOR SELECTION 
In current feedback amplifiers, selection of feedback and gain 
resistors has an impact on the MTPR performance, bandwidth, 
and gain flatness. Take care in selecting these resistors so that 
optimum performance is achieved. Table 6 below shows the 
recommended resistor values for use in a variety of gain 
settings. These values are suggested as a good starting point 
when designing for any application. 
Table 6. Resistor Selection Guide 
Gain   R
F
 (Ω)   R
G
 (Ω)  
+1   1000   ∞  
−1   500   500  
+2   650   650  
+5   750   187  
+10  
1000  
111  
BIAS PIN AND PWDN FEATURES 
The AD8016 is designed to cover both central office (CO)  
and customer premise equipment (CPE) ends of an xDSL 
application. It offers full versatility in setting quiescent bias 
levels for the particular application from full on to reduced  
bias (in three steps) to full off (via BIAS pin). This versatility 
gives the modem designer the flexibility to maximize efficiency 
while maintaining reasonable levels of MTPR performance. 
Optimizing driver efficiency while delivering the required DMT 
power is accomplished with the AD8016 through the use of on-
chip power management features. Two digitally programmable 
logic pins, PWDN1 and PWDN0, may be used to select four 
different bias levels: 100%, 60%, 40%, and 25% of full quiescent 
power (see Table 7). 
Table 7. PWDN Code Selection Guide 
PWDN1 
Code  
PWDN0 
Code   Quiescent Bias Level  
1   1   100% (full on)  
1   0   60%  
0   1   40%  
0   0   25% (low Z
OUT
 but not off)  
X   X   Full off (high Z
OUT
 via 250 μA pulled out of 
BIAS pin)  
T
Z
R
IN
I
IN
+
+
–
R
F
V
OUT
R
N
R
G
V
IN
01019-042










