Datasheet
AD80066
Rev. A | Page 8 of 20
ANALOG
INPUTS
CDSCLK2
ADCCLK
OUTPUT
DATA
(D[7:0])
t
OD
PIXEL n
t
AD
HIGH BYTE LOW BYTE LOW BYTEHIGH BYTE HIGH BYTE LOW BYTE
PIXEL (n – 4) PIXEL (n – 4) PIXEL (n – 3) PIXEL (n – 3) PIXEL (n – 2) PIXEL (n – 2)
t
C2ADR
t
C2
t
PRB
t
C2ADF
t
ADCCLK
t
ADCCLK
0
8552-008
PIXEL (n + 1)
Figure 8. 1-Channel SHA Mode Timing
t
OD
t
OD
HIGH BYTE
(DB[15:8])
HIGH BYTE
(DB[15:8])
LOW BYTE
(DB[7:0])
LOW BYTE
(DB[7:0])
HIGH BYTE
(DB[15:8])
ADCCLK
OUTPUT DATA
(D[7:0])
LOW BYTE
(DB[7:0])
PIXEL n PIXEL n
0
8552-009
PIXEL (n + 1) PIXEL (n + 1) PIXEL (n + 2) PIXEL (n + 3)
Figure 9. Digital Output Data Timing
t
OD
ADCCLK
OUTPUT DATA
(D[7:0])
PIXEL n PIXEL (n + 1)
HIGH BYTE
(DB[15:8])
HIGH BYTE
(DB[15:8])
HIGH BYTE
(DB[15:8])
08552-010
PIXEL (n + 2)
Figure 10. Single-Byte Mode Digital Output Data Timing
t
LH
D8
D7
D6
D5
D4
D3 D2
D1
D0
t
DS
t
LS
t
DH
A0A2
R/W
SDATA
A1
SCLK
SLOAD
A3
0
8552-011
Figure 11. Serial Write Operation Timing
t
LH
D8 D7 D6 D5 D4 D3 D2 D1 D0
t
RDV
t
LS
A1A3 A2
SDATA
SCLK
S
LOAD
A0
R/W
08552-012
Figure 12. Serial Read Operation Timing










