Datasheet

AD8003
Rev. B | Page 5 of 16
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter Rating
Supply Voltage 11 V
Power Dissipation See Figure 3
RMS output voltages should be considered. If R
L
is referenced to
−V
S
, as in single-supply operation, the total drive power is V
S
×
I
OUT
. If the rms signal levels are indeterminate, consider the
worst case, when V
OUT
= V
S
/4 for R
L
to midsupply.
Common-Mode Input Voltage −V
S
− 0.7 V to +V
S
+ 0.7 V
Differential Input Voltage
±V
S
Exposed Paddle Voltage −V
S
Storage Temperature Range −65°C to +125°C
Operating Temperature Range −40°C to +85°C
Lead Temperature (Soldering 10 sec) 300°C
Junction Temperature 150°C
()
(
)
L
S
SS
D
R
/V
IVP
2
4
+×=
In single-supply operation with
R
L
referenced to −V
S
, worst case
is
V
OUT
= V
S
/2.
Airflow increases heat dissipation, effectively reducing θ
JA
.
In addition, more metal directly in contact with the package
leads and exposed paddle from metal traces, through holes,
ground, and power planes reduce θ
JA
.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Figure 3 shows the maximum safe power dissipation in the
package vs. the ambient temperature for the exposed paddle,
4 mm × 4 mm LFCSP_VQ (70°C/W) package on a JEDEC
standard 4-layer board. θ
JA
values are approximations.
THERMAL RESISTANCE
05721-037
0
3.0
–55 125
AMBIENT TEMPERATURE (°C)
MAXIMUM POWER DISSIPATION (W)
0.5
1.0
1.5
2.0
2.5
–35 –15 5 25 45 65 85 105
θ
JA
is specified for the worst-case conditions, that is, θ
JA
is specified
for device soldered in circuit board for surface-mount packages.
Table 4. Thermal Resistance
Package Type θ
JA
Unit
24-Lead LFCSP_VQ 70 °C/W
Maximum Power Dissipation
The maximum safe power dissipation for the AD8003 is limited
by the associated rise in junction temperature (T
J
) on the die. At
approximately 150°C, which is the glass transition temperature,
the plastic changes its properties. Even temporarily exceeding
this temperature limit may change the stresses that the package
exerts on the die, permanently shifting the parametric performance
of the AD8003. Exceeding a junction temperature of 175°C for
an extended period can result in changes in silicon devices,
potentially causing degradation or loss of functionality.
Figure 3. Maximum Power Dissipation vs. Temperature for a 4-Layer Board
ESD CAUTION
The power dissipated in the package (P
D
) is the sum of the
quiescent power dissipation and the power dissipated in the die
due to the AD8003 drive at the output. The quiescent power is
the voltage between the supply pins (V
S
) times the quiescent
current (I
S
).
P
D
= Quiescent Power + (Total Drive Power – Load Power)
()
L
2
OUT
L
OUTS
SS
D
R
V
–
R
V
2
V
IVP
⎟
⎟
⎠
⎞
⎜
⎜
⎝
⎛
×+×=