Datasheet

AD7997/AD7998
Rev. 0 | Page 10 of 32
PIN CONFIGURATION AND PIN FUNCTION DESCRIPTIONS
AD7997/
AD7998
TOP VIEW
1
2
3
4
17
18
19
20
SDA
SCL
V
DD
AGND
V
IN
4
14
13
V
IN
2
5
(Not to Scale)
ALERT/BUSY
16
V
DD
15
AS
AGND
REF
IN
6
V
IN
1
7
V
IN
3
8
AGND
AGND
V
IN
5
9
V
IN
7
10
V
IN
8
12
11
V
IN
6
03473-0-003
CONVST
Figure 3. AD7998/AD7997 Pin Configuration
Table 5. Pin Function Descriptions
Pin No. Mnemonic Function
1, 3,
4, 20
AGND Analog Ground. Ground reference point for all circuitry on the AD7997/AD7998. All analog input signals should be
referred to this AGND voltage.
2, 5 V
DD
Power Supply Input. The V
DD
range for the AD7997/AD7998 is from 2.7 V to 5.5 V.
6 REF
IN
Voltage Reference Input. The external reference for the AD7997/AD7998 should be applied to this input pin. The
voltage range for the external reference is 1.2 V to V
DD
. A 0.1 µF and 1 µF capacitors should be placed between REF
IN
and AGND. See Typical Connection Diagram.
7 V
IN
1 Analog Input 1. Single-ended analog input channel. The input range is 0 V to REF
IN
.
8 V
IN
3 Analog Input 3. Single-ended analog input channel. The input range is 0 V to REF
IN
.
9 V
IN
5 Analog Input 5. Single-ended analog input channel. The input range is 0 V to REF
IN
.
10 V
IN
7 Analog Input 7. Single-ended analog input channel. The input range is 0 V to REF
IN
.
11 V
IN
8 Analog Input 8. Single-ended analog input channel. The input range is 0 V to REF
IN
.
12 V
IN
6 Analog Input 6. Single-ended analog input channel. The input range is 0 V to REF
IN
.
13 V
IN
4 Analog Input 4. Single-ended analog input channel. The input range is 0 V to REF
IN
.
14 V
IN
2 Analog Input 2. Single-ended analog input channel. The input range is 0 V to REF
IN
.
15 AS
Logic Input. Address select input that selects one of three I
2
C addresses for the AD7997/AD7998, as shown in Table 6.
The device address depends on the voltage applied to this pin.
16
CONVST
Logic Input Signal. Convert start signal. This is an edge-triggered logic input. The rising edge of this signal powers up
the part. The power-up time for the part is 1 µs. The falling edge of
CONVST
places the track/hold into hold mode and
initiates a conversion. A power-up time of at least 1 µs must be allowed for the
CONVST
high pulse; otherwise, the
conversion result is invalid (see the Modes of Operation section).
17 ALERT/BUSY Digital Output. Selectable as an ALERT or BUSY output function. When configured as an ALERT, this pin acts as an out-
of-range indicator and, if enabled, becomes active when the conversion result violates the DATAHIGH or DATALOW
register values. See the Limit Registers section. When configured as a BUSY output, this pin becomes active when a
conversion is in progress. Open-drain output.
18 SDA Digital I/O. Serial bus bidirectional data. Open-drain output. External pull-up resistor required.
19 SCL Digital Input. Serial bus clock. Open-drain input. External pull-up resistor required.
Table 6. I
2
C Address Selection
Part Number AS Pin I
2
C Address
AD7997-0 AGND 010 0001
AD7997-0 V
DD
010 0010
AD7997-1 AGND 010 0011
AD7997-1 V
DD
010 0100
AD7997-x
1
Float 010 0000
AD7998-0 AGND 010 0001
AD7998-0 V
DD
010 0010
AD7998-1 AGND 010 0011
AD7998-1 V
DD
010 0100
AD7998-x
1
Float 010 0000
1
If the AS pin is left floating on any of the AD7997/AD7998 parts, the device address is 010 0000.