Datasheet

AD7991/AD7995/AD7999
Rev. B | Page 20 of 28
INTERNAL REGISTER STRUCTURE
CONFIGURATION REGISTER
The configuration register is an 8-bit write-only register that is used to set the operating modes of the AD7991/AD7995/AD7999. The bit
functions are outlined in Table 1 0 . A single-byte write is necessary when writing to the configuration register. D7 is the MSB. When the
master writes to the AD7991/AD7995/AD7999, the first byte is written to the configuration register.
Table 9. Configuration Register Bit Map and Default Settings at Power-Up
D7 D6 D5 D4 D3 D2 D1 D0
CH3 CH2 CH1 CH0 REF_SEL FLTR Bit trial delay Sample delay
1 1 1 1 0 0 0 0
Table 10. Bit Function Descriptions
Bit Mnemonic Comment
D7 to D4 CH3 to CH0
These four channel address bits select the analog input channel(s) to be converted. If a channel address bit
(Bit D7 to Bit D4) is set to 1, a channel is selected for conversion. If more than one channel bit is set to 1, the
AD7991/AD7995/AD7999 sequence through the selected channels, starting with the lowest channel. All
unused channels should be set to 0. Table 11 shows how these four channel address bits are decoded. Prior
to the device initiating a conversion, the channel(s) must be selected in the configuration register.
D3 REF_SEL
This bit allows the user to select the supply voltage as the reference or choose to use an external reference. If
this bit is 0, the supply is used as the reference, and the device acts as a 4-channel input part. If this bit is set
to 1, an external reference must be used and applied to the V
IN3
/V
REF
pin, and the device acts as a 3-channel
input part.
D2 FLTR
The value written to this bit of the control register determines whether the filtering on SDA and SCL is
enabled or bypassed. If this bit is set to 0, the filtering is enabled; if it set to 1, the filtering is bypassed.
D1 Bit trial delay See the Sample Delay and Bit Trial Delay section.
D0 Sample delay See the Sample Delay and Bit Trial Delay section.
Table 11. Channel Selection
D7 D6 D5 D4 Analog Input Channel
1
0 0 0 0 No channel selected
0 0 0 1 Convert on V
IN0
0 0 1 0 Convert on V
IN1
0 0 1 1 Sequence between V
IN0
and V
IN1
0 1 0 0 Convert on V
IN2
0 1 0 1 Sequence between V
IN0
and V
IN2
0 1 1 0 Sequence between V
IN1
and V
IN2
0 1 1 1 Sequence among V
IN0
, V
IN1
, and V
IN2
1 0 0 0 Convert on V
IN3
1 0 0 1 Sequence between V
IN0
and V
IN3
1 0 1 0 Sequence between V
IN1
and V
IN3
1 0 1 1 Sequence among V
IN0
, V
IN1
, and V
IN3
1 1 0 0 Sequence between V
IN2
and V
IN3
1 1 0 1 Sequence among V
IN0
, V
IN2
, and V
IN3
1 1 1 0 Sequence among V
IN1
, V
IN2
, and V
IN3
1 1 1 1 Sequence among V
IN0
, V
IN1
, V
IN2
, and V
IN3
1
The AD7991/AD7995/AD7999 converts on the selected channel in the sequence in ascending order, starting with the lowest channel in the sequence.