Datasheet

AD7991/AD7995/AD7999
Rev. B | Page 10 of 28
Limit at t
MIN
, t
MAX
Parameter Conditions Min Typ Max Unit Description
t
10
Standard mode 300 ns t
FDA
, fall time of the SDA signal
Fast mode 20 + 0.1 C
B
300 ns
High speed mode
C
B
= 100 pF maximum 10 80 ns
C
B
= 400 pF maximum 20 160 ns
t
11
Standard mode 1000 ns t
RCL
, rise time of the SCL signal
Fast mode 20 + 0.1 C
B
300 ns
High speed mode
C
B
= 100 pF maximum 10 40 ns
C
B
= 400 pF maximum 20 80 ns
t
11A
Standard mode 1000 ns
t
RCL1
, rise time of the SCL signal after a repeated
start condition and after an acknowledge bit
Fast mode 20 + 0.1 C
B
300 ns
High speed mode
C
B
= 100 pF maximum 10 80 ns
C
B
= 400 pF maximum 20 160 ns
t
12
Standard mode 300 ns t
FCL
, fall time of the SCL signal
Fast mode 20 + 0.1 C
B
300 ns
High speed mode
C
B
= 100 pF maximum 10 40 ns
C
B
= 400 pF maximum 20 80 ns
t
SP
1
Fast mode 0 50 ns Pulse width of the suppressed spike
High speed mode 0 10 ns
t
POWER-UP
0.6 μs Power-up and acquisition time
1
Functionality is tested during production.
2
A device must provide a data hold time for SDA in order to bridge the undefined region of the SCL falling edge.
3
For 3 V supplies, the maximum hold time with C
B
= 100 pF maximum is 100 ns maximum.
t
6
t
7
t
2
t
11
t
4
t
1
t
12
t
10
t
5
t
9
t
6
t
3
t
8
0
6461-002
SCL
S
SDA
S = START CONDITION
P = STOP CONDITION
P PS
Figure 2. 2-Wire Serial Interface Timing Diagram