Datasheet

AD7985
Rev. A | Page 4 of 28
Table 3.
Parameter Test Conditions/Comments Min Typ Max Unit
INTERNAL REFERENCE PDREF is low
Output Voltage T
A
= 25°C 4.081 4.096 4.111 V
Temperature Drift −40°C to +85°C ±10 ppm/°C
Line Regulation AVDD = 2.5 V ± 5% ±50 ppm/V
Turn-On Settling Time C
REF
= 10 μF, C
REFIN
= 0.1 μF 40 ms
REFIN Output Voltage REFIN at 25°C 1.2 V
REFIN Output Resistance 6 kΩ
EXTERNAL REFERENCE PDREF is high, REFIN is low
Voltage Range 2.4 5.1 V
Current Drain 500 µA
REFERENCE BUFFER
REFIN Input Voltage Range 1.2 V
REFIN Input Current 160 µA
DIGITAL INPUTS
Logic Levels
V
IL
−0.3 0.1 × VIO V
V
IH
0.9 × VIO VIO + 0.3 V
I
IL
−1 +1 µA
I
IH
−1 +1 µA
DIGITAL OUTPUTS
Data Format Serial 16 bits, straight binary
Pipeline Delay Conversion results available immediately
after completed conversion
V
OL
I
SINK
= +500 µA 0.4 V
V
OH
I
SOURCE
= −500 µA VIO − 0.3 V
POWER SUPPLIES
AVDD, DVDD 2.375 2.5 2.625 V
BVDD 4.75 5.0 5.25 V
VIO Specified performance 1.8 2.5 2.7 V
Standby Current
1, 2
AVDD = DVDD = VIO = 2.5 V 1.0 µA
Power Dissipation
With Internal Reference 2.5 MSPS throughput 28 33 mW
2.0 MSPS throughput 25 30 mW
With External Reference 2.5 MSPS throughput 15.5 17 mW
2.0 MSPS throughput 12 13 mW
TEMPERATURE RANGE
3
Specified Performance T
MIN
to T
MAX
−40 +85 °C
1
With all digital inputs forced to VIO or GND as required.
2
During acquisition phase.
3
Contact an Analog Devices, Inc., sales representative for the extended temperature range.