Datasheet

AD7938-6 Data Sheet
220Ω
2 × V
REF
p-p
GND
440Ω
220
Ω
Rev. C | Page 20 of 32
10kΩ
220Ω
20kΩ
220Ω
27Ω
27Ω
V+
V–
V+
V–
A
V
IN+
V
IN–
V
REF
3.75V
2.5V
1.25V
AD7938-6
0.47µF
04751-035
3.75V
2.5V
1.25V
Figure 27. Dual Op Amp Circuit to Convert a Single-Ended
Bipolar Signal into a Differential Unipolar Signal
10kΩ
V
REF
p-p
V
REF
GND
440Ω
220
Ω
220Ω
20kΩ
220Ω
27Ω
27Ω
V+
V–
V+
V–
A
V
IN+
V
IN–
V
REF
AD7938-6
0.47µF
04751-036
3.75V
2.5V
1.25V
3.75V
2.5V
1.25V
Figure 28. Dual Op Amp Circuit to Convert a Single-Ended
Unipolar Signal into a Differential Signal
Another method of driving the AD7938-6 is to use the AD8138
(or equivalent) differential amplifier. The AD8138 can be used
as a single-ended-to-differential amplifier or as a differential-to-
differential amplifier. The device is as easy to use as an op amp
and greatly simplifies differential signal amplification and driving.
Pseudo Differential Mode
The AD7938-6 can have four pseudo differential pairs (Pseudo
Mode 1) or seven pseudo differential inputs (Pseudo Mode 2)
by setting the MODE0 and MODE1 bits in the control register
to 1, 0 and 1, 1, respectively. In the case of the four pseudo
differential pairs, V
IN
+ is connected to the signal source, which
must have an amplitude of V
REF
(or 2 × V
REF
depending on the
range chosen) to make use of the full dynamic range of the part.
A dc input is applied to the V
IN−
pin. The voltage applied to this
input provides an offset from ground or a pseudo ground for
the V
IN+
input. In the case of the seven pseudo differential
inputs, the seven analog input signals inputs are referred to a dc
voltage applied to V
IN
7.
The benefit of pseudo differential inputs is that they separate
the analog input signal ground from the ADC ground allowing
dc common-mode voltages to be cancelled. The specified
voltage range for the V
IN−
pin while in pseudo differential mode
is −0.1 V to +0.4 V; however, typically this range can extend to
−0.3 V to +0.7 V when V
DD
= 3 V, or −0.3 V to +1.8 V when
V
DD
= 5 V. Figure 29 shows a connection diagram for pseudo
differential mode.
V
IN+
V
IN–
V
REF
AD7938-6*
*ADDITIONAL PINS OMITTED FOR CLARITY. 04751-037
V
REF
p-p
DC INPUT
VOLTAGE
0.47µF
Figure 29. Pseudo Differential Mode Connection Diagram
ANALOG INPUT SELECTION
As shown in Tabl e 9, the user can set up their analog input
configuration by setting the values in the MODE0 and MODE1
bits in the control register. Assuming the configuration has been
chosen, there are different ways of selecting the analog input to
be converted depending on the state of the SEQ and SHDW bits
in the control register.
Traditional Multichannel Operation (SEQ = 0, SHDW = 0)
Any one of eight analog input channels or four pairs of channels
can be selected for conversion in any order by setting the SEQ
and SHDW bits in the control register to 0. The channel to be
converted is selected by writing to the address bits, ADD2 to
ADD0, in the control register to program the multiplexer prior
to the conversion. This mode of operation is that of a traditional
multichannel ADC where each data write selects the next
channel for conversion. Figure 30 shows a flow chart of this
mode of operation. The channel configurations are shown in
Table 9 .
POWER ON
WRITE TO THE CONTROL REGISTER TO
SET UP OPERATING MODE, ANALOG INPUT
AND OUTPUT CONFIGURATION
SET SEQ = SHDW = 0. SELECT THE DESIRED
CHANNEL TO CONVERT (ADD2 TO ADD0).
ISSUE CONVST PULSE TO INITIATE A CONVERSION
ON THE SELECTED CHANNEL.
INITIATE A READ CYCLE TO READ THE DATA
FROM THE SELECTED CHANNEL.
INITIATE A WRITE CYCLE TO SELECT THE NEXT
CHANNEL TO BE CONVERTED BY
CHANGING THE VALUES OF BITS ADD2 TO ADD0
IN THE CONTROL REGISTER. SEQ = SHDW = 0.
04751-038
Figure 30. Traditional Multichannel Operation Flow Chart