Datasheet

AD7923 Data Sheet
Rev. D | Page 4 of 24
Parameter B Version
1
Unit Test Conditions/Comments
LOGIC OUTPUTS
Output High Voltage, V
OH
V
DRIVE
– 0.2 V min I
SOURCE
= 200 µA, AV
DD
= 2.7 V to 5.25 V
Output Low Voltage, V
OL
0.4 V max I
SINK
= 200 µA
Floating-State Leakage Current ±1 µA max
Floating-State Output Capacitance
3
10
pF max
Output Coding Twos Complement Coding bit set to 0
Straight (Natural)
Binary
Coding bit set to 1
CONVERSION RATE
Conversion Time
Track-and-Hold Acquisition Time 800 ns max 16 SCLK cycles with SCLK at 20 MHz
300 ns max Sinewave input
300 ns max Full-scale step Input
Throughput Rate 200 kSPS max See Serial Interface section
POWER REQUIREMENTS
AV
DD
2.7/5.25 V min/max
V
DRIVE
2.7/5.25 V min/max
I
DD
4
Digital I/Ps = 0 V or V
DRIVE
During Conversion 2.7 mA max AV
DD
= 4.75 V to 5.25 V, f
SCLK
= 20 MHz
2.0 mA max AV
DD
= 2.7 V to 3.6 V, f
SCLK
= 20 MHz
Normal Mode (Static) 600 µA typ AV
DD
= 2.7 V to 5.25 V, SCLK on or off
Normal Mode (Operational) f
SAMPLE
= 200 kSPS
1.5
mA max
AV
DD
= 4.75 V to 5.25 V, f
SCLK
= 20 MHz
1.2 mA max AV
DD
= 2.7 V to 3.6 V, f
SCLK
= 20 MHz
Using Auto Shutdown Mode f
SAMPLE
= 200 kSPS 900 µA typ AV
DD
= 4.75 V to 5.25 V, f
SAMPLE
= 200 kSPS
650 µA typ AV
DD
= 2.7 V to 3.6 V, f
SAMPLE
= 200 kSPS
Auto Shutdown (Static) 0.5 µA max SCLK on or off (20 nA typ)
Full Shutdown Mode 0.5 µA max SCLK on or off (20 nA typ)
Power Dissipation
4
Normal Mode (Operational) f
SAMPLE
= 200 kSPS 7.5 mW max AV
DD
= 5 V, f
SCLK
= 20 MHz
3.6 mW max AV
DD
= 3 V, f
SCLK
= 20 MHz
Auto Shutdown (Static) 2.5 µW max AV
DD
= 5 V
1.5 µW max AV
DD
= 3 V
Full Shutdown Mode 2.5 µW max AV
DD
= 5 V
1.5 µW max AV
DD
= 3 V
1
Temperature range: B Version: −40°C to +125°C.
2
See Terminology section.
3
Sample tested @ 25°C to ensure compliance.
4
See Power vs. Throughput Rate section.