Datasheet

AD7908/AD7918/AD7928
Rev. D | Page 9 of 32
TIMING SPECIFICATIONS
AV
DD
= 2.7 V to 5.25 V, V
DRIVE
≤ AV
DD
, REF
IN
= 2.5 V, T
A
= T
MIN
to T
MAX
, unless otherwise noted.
1
Table 4.
Limit at T
MIN
, T
MAX
AD7908/AD7918/AD7928
Parameter AV
DD
= 3 V AV
DD
= 5 V Unit Description
f
SCLK
2
10 10 kHz min
20 20 MHz max
t
CONVERT
16 × t
SCLK
16 × t
SCLK
t
QUIET
50 50 ns min
Minimum quiet time required between CS
rising edge and start of
next conversion
t
2
10 10 ns min
CS
to SCLK setup time
t
3
3
35 30 ns max
Delay from CS
until DOUT three-state disabled
t
4
3
40 40 ns max Data access time after SCLK falling edge
t
5
0.4 × t
SCLK
0.4 × t
SCLK
ns min SCLK low pulse width
t
6
0.4 × t
SCLK
0.4 × t
SCLK
ns min SCLK high pulse width
t
7
10 10 ns min SCLK to DOUT valid hold time
t
8
4
15/45 15/35 ns min/max SCLK falling edge to DOUT high impedance
t
9
10 10 ns min DIN setup time prior to SCLK falling edge
t
10
5 5 ns min DIN hold time after SCLK falling edge
t
11
20 20 ns min
16
th
SCLK falling edge to CS high
t
12
1 1 μs max Power-up time from full power-down/auto shutdown mode
1
Sample tested at 25°C to ensure compliance. All input signals are specified with tr = tf = 5 ns (10% to 90% of AV
DD
) and timed from a voltage level of 1.6 V. See Figure 2.
The 3 V operating range spans from 2.7 V to 3.6 V. The 5 V operating range spans from 4.75 V to 5.25 V.
2
Mark/space ratio for the SCLK input is 40/60 to 60/40.
3
Measured with the load circuit of Figure 2 and defined as the time required for the output to cross 0.4 V or 0.7 × V
DRIVE
.
4
t
8
is derived from the measured time taken by the data outputs to change 0.5 V when loaded with the circuit of Figure 2. The measured number is then extrapolated
back to remove the effects of charging or discharging the 50 pF capacitor. This means that the time, t
8
, quoted in the timing characteristics is the true bus relinquish
time of the part and is independent of the bus loading.
TO
OUTPUT
PIN
50pF
I
OH
I
OL
C
L
200µA
200µA
1.6V
0
3089-002
Figure 2. Load Circuit for Digital Output Timing Specifications